D a t a S h e e t
Table 10.3 Command Definitions (x8 Mode, BYTE# = VIL)
Bus Cycles (Notes 2–5)
First
Second
Third
Fourth
Data
Fifth
Data
Sixth
Data
Command Sequence
(Note 1)
Addr Data Addr Data Addr Data
Addr
Addr
Addr
Read (Note 6)
Reset (Note 7)
Manufacturer ID
1
1
4
6
4
4
RA
RD
F0
XXX
AAA
AAA
AAA
AAA
AA
AA
AA
AA
555
555
555
555
55
55
55
55
AAA
AAA
AAA
AAA
90
90
90
90
X00
X02
X02
X06
01
7E
Device ID (Note 9)
X1C (Note 17)
X1E
(Note 17)
Device ID
(Note 10)
Secured Silicon Sector Factory Protect
Sector Protect Verify
(Note 11)
4
AAA
AA
555
55
AAA
90
(SA)X04
00/01
Enter Secured Silicon Sector Region
Exit Secured Silicon Sector Region
Program
3
4
4
3
1
3
6
6
AAA
AAA
AAA
AAA
SA
AA
AA
AA
AA
29
555
555
555
555
55
55
55
55
AAA
AAA
AAA
SA
88
90
A0
25
XXX
PA
00
PD
BC
Write to Buffer (Note 12)
Program Buffer to Flash
Write to Buffer Abort Reset (Note 13)
Chip Erase
SA
PA
PD
WBL
PD
AAA
AAA
AAA
AAA
XXX
XXX
XXX
XXX
AA
AA
AA
AA
AA
A0
90
555
555
555
555
PA
55
55
55
55
PD
00
AAA
AAA
AAA
AAA
F0
80
80
20
AAA
AAA
AA
AA
555
555
55
55
AAA
SA
10
30
Sector Erase
Unlock Bypass
Unlock Bypass Program
Unlock Bypass RESET
Program/Erase Suspend (Note 14)
Program/Erase Resume (Note 15)
CFI Query (Note 16)
XXX
1
1
1
B0
30
98
Legend
X = Don’t care
PD = Program Data for location PA. Data latches on rising edge of WE# or
CE# pulse, whichever happens first.
RA = Read Address of memory location to be read.
RD = Read Data read from location RA during read operation.
SA = Sector Address of sector to be verified (in autoselect mode) or erased.
Address bits A21–A15 uniquely select any sector.
PA = Program Address. Addresses latch on falling edge of WE# or CE# pulse,
whichever happens later.
WBL = Write Buffer Location. Address must be within same write buffer page
as PA.
BC = Byte Count. Number of write buffer locations to load minus 1.
Notes
1. See Table 8.1 on page 17 for description of bus operations.
10. Refer to Table 8.9 on page 29, for data indicating Secured Silicon Sector
factory protect status.
2. All values are in hexadecimal.
11. Data is 00h for an unprotected sector and 01h for a protected sector.
3. Shaded cells indicate read cycles. All others are write cycles.
12. Total number of cycles in command sequence is determined by number of
bytes written to write buffer. Maximum number of cycles in command
sequence is 37, including Program Buffer to Flash command.
4. During unlock and command cycles, when lower address bits are 555 or
AAA as shown in table, address bits above A11 are don’t care.
5. Unless otherwise noted, address bits A21–A11 are don’t cares.
6. No unlock or command cycles required when device is in read mode.
13. Command sequence resets device for next command after aborted write-
to-buffer operation.
7. Reset command is required to return to read mode (or to erase-suspend-
read mode if previously in Erase Suspend) when device is in autoselect
mode, or if DQ5 goes high while device is providing status information.
14. System may read and program in non-erasing sectors, or enter autoselect
mode, when in Erase Suspend mode. Erase Suspend command is valid
only during a sector erase operation.
8. Fourth cycle of autoselect command sequence is a read cycle. Data bits
DQ15–DQ8 are don’t care. See Autoselect Command Sequence
on page 42 for more information.
15. Erase Resume command is valid only during Erase Suspend mode.
16. Command is valid when device is ready to read array data or when device
is in autoselect mode.
9. For S29GL064N and S29GL032A Device ID must be read in three cycles.
17. Refer to Table 8.9 on page 29, for individual Device IDs per device density
and model number.
November 16, 2007 S29GL-N_01_09
S29GL-N MirrorBit® Flash Family
53
SPANSION [ SPANSION ]
