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S29CD032G0JFAN012 参数 Datasheet PDF下载

S29CD032G0JFAN012图片预览
型号: S29CD032G0JFAN012
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS 2.5伏只突发模式下的双启动,同步读/写FLASH MEMORY [CMOS 2.5 VOLT ONLY BURST MODE DUAL BOOT, SIMULTANEOUS READ /WRITE FLASH MEMORY]
分类和应用:
文件页数/大小: 93 页 / 1616 K
品牌: SPANSION [ SPANSION ]
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A d v a n c e I n f o r m a t i o n  
DQ5: Exceeded Timing Limits  
DQ5 indicates whether the program or erase time has exceeded a specified inter-  
nal pulse count limit. Under these conditions DQ5 produces a “1.This is a failure  
condition that indicates the program or erase cycle was not successfully  
completed.  
The DQ5 failure condition may appear if the system tries to program a “1” to a  
location that is previously programmed to “0.Only an erase operation can  
change a “0” back to a “1.” Under this condition, the device halts the opera-  
tion, and when the operation has exceeded the timing limits, DQ5 produces a “1.”  
Under both these conditions, the system must issue the reset command to return  
the device to reading array data.  
DQ3: Sector Erase Timer  
After writing a sector erase command sequence, the system may read DQ3 to de-  
termine whether or not an erase operation has begun. (The sector erase timer  
does not apply to the chip erase command.) If additional sectors are selected for  
erasure, the entire time-out also applies after each additional sector erase com-  
mand. When the time-out is complete, DQ3 switches from “0” to “1.The system  
may ignore DQ3 if the system can guarantee that the time between additional  
sector erase commands will always be less than 50 µs. See also the Sector Erase  
Command section.  
After the sector erase command sequence is written, the system should read the  
status on DQ7 (Data# Polling) or DQ6 (Toggle Bit I) to ensure the device has ac-  
cepted the command sequence, and then read DQ3. If DQ3 is “1, the internally  
controlled erase cycle has begun; all further commands (other than Erase Sus-  
pend) are ignored until the erase operation is complete. If DQ3 is “0, the device  
will accept additional sector erase commands. To ensure the command has been  
accepted, the system software should check the status of DQ3 prior to and fol-  
lowing each subsequent sector erase command. If DQ3 is high on the second  
status check, the last command might not have been accepted. Table 21 shows  
the outputs for DQ3.  
Table 21. Write Operation Status  
DQ7  
DQ5  
DQ2  
Operation  
(Note 2)  
DQ6  
(Note 1)  
DQ3  
N/A  
1
(Note 2)  
RY/BY#  
Embedded Program Algorithm  
Embedded Erase Algorithm  
DQ7#  
0
Toggle  
Toggle  
0
0
No toggle  
Toggle  
0
0
Standard  
Mode  
Reading within Erase Suspended  
Sector  
1
No toggle  
0
N/A  
Toggle  
1
Erase  
Suspend  
Mode  
Reading within Non-Erase  
Suspended Sector  
Data  
Data  
Data  
0
Data  
N/A  
Data  
N/A  
1
0
Erase-Suspend-Program  
DQ7#  
Toggle  
Notes:  
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing  
limits. See DQ5: Exceeded Timing Limits for more information.  
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further  
details.  
68  
S29CD032G  
30606B0 March 22, 2004  
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