A d v a n c e I n f o r m a t i o n
Revision Summary
Revision A (July 29, 2003)
Initial release.
Revision A+1 (December 11, 2003)
Global
Converted to Spansion data sheet.
Distinctive Characteristics
Added Continuous Burst to the Programmable Burst interface section.
Added Additional Features section.
Ordering Information
Added additional marking to tables.
Global
Converted to Spansion data sheet.
Table 1. ”Device Bus Operation”
Removed Autoselect Manufacturer Code Operation and Autoselect Device Code
operation.
Added Asynchronous and Synchronous write operation.
Table 2. ”Bank Assignment for Boot Bank Sector Devices,” Table 3.
”Ordering Option 00”, and Table 4. ”Ordering Option 01”
Changed Banks to 0 and 1.
Writing Commands/Command Sequence
Added 7th paragraph.
Synchronous (Burst) Read Operation and Linear Burst Read Operations
Re-worded sections.
Table 6. ”32- Bit Linear and Burst Data Order”
Removed the Thirty-Two Linear Data Transfer sequence from table.
Initial Burst Access Delay Control
Removed text referring to the Clock Configuration bit in the Control Register.
SecSi Sector Entry Command
Corrected the addresses for the top and bottom boot blocks.
Revision B (March 22, 2004)
Global
Changed address range where specified to include A19 (where previously speci-
fied only up to A18).
Distinctive Characteristics
Programmable Burst Interface: Deleted reference to continuous burst.
High Performance Read Access: Changed fastest initial access time to 48 ns;
changed fastest burst access time to 7.5 ns.
Ultra Low Power Consumption: Added 75 MHz capability for Fortified BGA
packages.
General Description
Deleted last sentence in paragraph that begins with “The Versatile I/OTM (V
)
CCQ
feature...”.
March 22, 2004 30606B0
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