A d v a n c e I n f o r m a t i o n
mand ......................................................................................................... 57
SecSi Sector Protection Bit Program Command ........................ 57
PPB Lock Bit Set Command .............................................................. 57
DYB Write Command ........................................................................ 57
Password Unlock Command .............................................................58
PPB Program Command .....................................................................58
All PPB Erase Command .................................................................... 59
DYB Write .............................................................................................. 59
PPB Lock Bit Set .................................................................................... 59
DYB Status .............................................................................................. 59
PPB Status ............................................................................................... 59
PPB Lock Bit Status .............................................................................. 59
Non-volatile Protection Bit Program And Erase Flow ............. 59
Table 19. Memory Array Command Definitions (x32 Mode) .....61
Table 20. Sector Protection Command Definitions (x32 Mode) .62
DQ7: Data# Polling .............................................................................. 63
Figure 6. Data# Polling Algorithm ....................................... 64
RY/BY#: Ready/Busy# ......................................................................... 65
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 10. ICC1 Current vs. Time (Showing Active and Automatic
Sleep Currents)................................................................ 71
Figure 11. Typical ICC1 vs. Frequency.................................. 71
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 12. Test Setup ....................................................... 72
Table 22. Test Specifications .............................................. 72
Key to Switching Waveforms . . . . . . . . . . . . . . . . 72
Figure 13. Input Waveforms and Measurement Levels........... 72
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 14. VCC and VIO Power-up Diagram........................... 73
Figure 15. Conventional Read Operations Timings................. 74
Figure 16. Burst Mode Read (x32 Mode).............................. 76
Figure 17. Asynchronous Command Write Timing ................. 77
Figure 18. Synchronous Command Write/Read Timing........... 77
Figure 19. RESET# Timings ............................................... 78
Figure 20. WP# Timing ..................................................... 79
Figure 21. Program Operation Timings ................................ 81
Figure 22. Chip/Sector Erase Operation Timings................... 82
Figure 23. Back-to-back Cycle Timings................................ 82
Figure 24. Data# Polling Timings
DQ6: Toggle Bit I .................................................................................. 65
DQ2: Toggle Bit II ................................................................................66
(During Embedded Algorithms) .......................................... 83
Figure 25. Toggle Bit Timings
Reading Toggle Bits DQ6/DQ2 ........................................................66
Figure 7. Toggle Bit Algorithm ............................................ 67
DQ5: Exceeded Timing Limits ..........................................................68
DQ3: Sector Erase Timer ..................................................................68
Table 21. Write Operation Status ........................................68
(During Embedded Algorithms) .......................................... 83
Figure 26. DQ2 vs. DQ6 for Erase/Erase Suspend Operations . 84
Figure 27. Synchronous Data Polling Timing/Toggle Bit Timings 84
Figure 28. Sector Protect/Unprotect Timing Diagram............. 85
Figure 29. Alternate CE# Controlled Write Operation Timings. 87
Erase and Programming Performance . . . . . . . . 88
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 88
PQFP and Fortified BGA Pin Capacitance. . . . . 88
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 89
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . .91
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . .69
Figure 8. Maximum Negative Overshoot Waveform................ 69
Figure 9. Maximum Positive Overshoot Waveform ................. 69
Industrial (I) Devices ......................................................................................................69
Extended (E) Devices ....................................................................................................69
VCC Supply Voltages ......................................................................................................69
VIO Supply Voltages .......................................................................................................69
March 22, 2004 30606B0
S29CD032G
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SPANSION [ SPANSION ]
