A d v a n c e I n f o r m a t i o n
condition, the device halts the operation, and when the operation has exceeded the timing limits,
DQ5 produces a 1.
Under both these conditions, the system must issue the reset command to return the device to
reading array data.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the system may read DQ3 to determine whether
or not an erase operation has begun. (The sector erase timer does not apply to the chip erase
command.) If additional sectors are selected for erasure, the entire time-out also applies after
each additional sector erase command. When the time-out is complete, DQ3 switches from 0 to
1. The system may ignore DQ3 if the system can guarantee that the time between additional
sector erase commands will always be less than 50 μs. See also the Sector Erase Command
Sequence on page 35 section.
After the sector erase command sequence is written, the system should read the status on DQ7
(Data# Polling) or DQ6 (Toggle Bit I) to ensure the device has accepted the command sequence,
and then read DQ3. If DQ3 is 1, the internally controlled erase cycle has begun; all further com-
mands (other than Erase Suspend) are ignored until the erase operation is complete. If DQ3 is 0,
the device will accept additional sector erase commands. To ensure the command has been ac-
cepted, the system software should check the status of DQ3 prior to and following each
subsequent sector erase command. If DQ3 is high on the second status check, the last command
might not have been accepted. Table 18 shows the outputs for DQ3.
Table 18. Write Operation Status
DQ7
DQ5
DQ2
Operation
(Note 2)
DQ6
(Note 1)
DQ3
N/A
1
(Note 2)
RY/BY#
Embedded Program Algorithm
Embedded Erase Algorithm
DQ7#
0
Toggle
Toggle
0
0
No toggle
Toggle
0
0
Standard
Mode
Reading within Erase
Suspended Sector
1
No toggle
0
N/A
Toggle
1
Erase
Suspend Reading within Non-Erase
Data
Data
Data
0
Data
N/A
Data
N/A
1
0
Mode
Suspended Sector
Erase-Suspend-Program
DQ7#
Toggle
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing
limits. See DQ5: Exceeded Timing Limits on page 43 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
44
S29AL032D
S29AL032D_00_A3 June 13, 2005