D a t a S h e e t
AC Characteristics
555 for programPA for program
2AA for erase SA for sector erase
555 for chip erase
Data# Polling
Addresses
PA
t
t
WC
AS
t
AH
t
WH
WE#
OE#
t
GHEL
t
WHWH1 or
t
t
CP
CE#
t
WS
CPH
t
BUS
t
D
t
D
DOUT
DQ7
Data
t
R
A0 for programPD for program
55 for erase
30 for sector erase
10 for chip erase
RESET#
RY/BY#
Notes:
1. PA = program address, PD = program data, DQ7# = complement of the data written to the device, DOUT = data
written to the device.
2. Figure indicates the last two bus cycles of command sequence.
3. Word mode address used as an example.
Figure 24. Alternate CE# Controlled Write Operation Timings
Erase and Programming Performance
Parameter
Typ Note 1
Max Note 2
Unit
s
Comments
Sector Erase Time
Chip Erase Time
0.7
14
7
10
Excludes 00h programming
prior to erasure
s
Byte Programming Time
Word Programming Time
210
210
25
µs
µs
s
7
Excludes system level
overhead Note 5
Byte Mode
Word Mode
8.4
5.8
Chip Programming Time
Note 3
17
s
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V VCC, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
June 16, 2005 S29AL008D_00A3
S29AL008D
49
SPANSION [ SPANSION ]
