D a t a S h e e t
2. Under worst case conditions of 90°C, VCC = 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most
bytes program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program
command. See Table 5, on page 25 for further information on command definitions.
6. The device has a guaranteed minimum erase and program cycle endurance of 1,000,000 cycles.
Table 13. Latchup Characteristics
Description
Min
Max
Input voltage with respect to VSS on all pins except I/O pins
(including A9, OE#, and RESET#)
–1.0 V
12.5 V
Input voltage with respect to VSS on all I/O pins
VCC Current
–1.0 V
VCC + 1.0 V
+100 mA
–100 mA
Includes all pins except VCC. Test conditions: VCC = 3.0 V, one pin at a time.
Table 14. TSOP, SO, and BGA Pin Capacitance
Parameter
Symbol
Parameter Description
Test Setup
Package
TSOP, SO
BGA
Typ
6
Max
7.5
5.0
12
Unit
CIN
Input Capacitance
VIN = 0
4.2
8.5
5.4
7.5
3.9
TSOP, SO
BGA
COUT
Output Capacitance
VOUT = 0
VIN = 0
pF
6.5
9
TSOP, SO
BGA
CIN2
Control Pin Capacitance
4.7
Notes:
1. Sampled, not 100% tested.
2. Test conditions TA = 25°C, f = 1.0 MHz.
50
S29AL008D
S29AL008D_00A3 June 16, 2005
SPANSION [ SPANSION ]
