D A T A S H E E T
AC CHARACTERISTICS
Read-Only Operations
Parameter
Speed Options
Description
Test Setup
101,
101R
JEDEC Std.
90R
90
112R
112
120R
120
120
Unit
ns
tAVAV
tAVQV
tELQV
tRC
Read Cycle Time (Note 1)
Address to Output Delay
Min
100
110
110
110
CE#, OE# =
tACC
Max
VIL
90
100
120
120
ns
tCE
tPACC
tOE
OE# = VIL
Chip Enable to Output Delay
Page Access Time
Max
Max
Max
Max
Max
90
25
25
100
30
ns
ns
ns
ns
ns
30
30
40
40
30
30
40
40
tGLQV
tEHQZ
tGHQZ
Output Enable to Output Delay
Chip Enable to Output High Z (Note 1)
Output Enable to Output High Z (Note 1)
30
tDF
16
16
tDF
Output Hold Time From Addresses, CE# or
OE#, Whichever Occurs First
tAXQX
tOH
Min
Min
Min
0
0
ns
ns
ns
Read
Output Enable Hold
Time (Note 1)
tOEH
Toggle and
10
Data# Polling
Notes:
1. Not 100% tested.
2. See Figure 12 and Table 13 for test specifications.
3. AC Specifications listed are tested with VIO = VCC. Contact AMD for
information on AC operation with VIO ≠ VCC
.
tRC
Addresses Stable
tACC
Addresses
CE#
tRH
tRH
tDF
tOE
OE#
tOEH
WE#
tCE
tOH
Output Valid
HIGH Z
HIGH Z
Outputs
RESET#
RY/BY#
0 V
Figure 14. Read Operation Timings
44
Am29LV640MH/L
December 14, 2005
SPANSION [ SPANSION ]
