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AM29BDS320GTC9VMI 参数 Datasheet PDF下载

AM29BDS320GTC9VMI图片预览
型号: AM29BDS320GTC9VMI
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆位(2M ×16位) , 1.8伏只同时读/写,突发模式闪存 [32 Megabit (2 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory]
分类和应用: 闪存
文件页数/大小: 74 页 / 1108 K
品牌: SPANSION [ SPANSION ]
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P r e l i m i n a r y  
Table 8. Programmable Wait State Settings  
A14  
0
A13  
0
A12  
0
Total Initial Access Cycles  
2
3
4
5
6
7
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
Notes:  
1. Upon power-up or hardware reset, the default setting is seven wait states.  
2. RDY will default to being active with data when the Wait State Setting is set to a  
total initial access cycle of 2.  
3. Assumes even address.  
It is recommended that the wait state command sequence be written, even if the  
default wait state value is desired, to ensure the device is set as expected. A  
hardware reset will set the wait state to the default setting.  
Reduced Wait-State Handshaking Option  
If the device is equipped with the reduced wait-state handshaking option, the  
host system should set address bits A14–A12 to 010 for a clock frequency of 40  
MHz or to 011 for a clock frequency of 54 MHz for the system/device to execute  
at maximum speed.  
Table 9 describes the typical number of clock cycles (wait states) for various  
conditions.  
Table 9. Initial Access Cycles vs. Frequency  
Even  
Initial  
Addr.  
Initial with  
Odd Initial  
Addr.  
with  
System  
Frequency  
Range  
Even  
Initial  
Addr.  
Odd  
Device Speed  
Rating  
Addr.  
Boundary Boundary  
6–11 MHz  
2
2
3
4
4
5
2
3
4
5
5
6
3
4
5
6
6
7
4
5
6
7
7
8
12–23 MHz  
24–33 MHz  
34–40 MHz  
40–47 MHz  
48–54 MHz  
40 MHz  
54 MHz  
Note: In the 8-, 16- and 32-word burst read modes, the address pointer does not  
cross 64-word boundaries (3Fh, and addresses offset from 3Fh by a multiple of 64).  
The autoselect function allows the host system to determine whether the flash  
device is enabled for reduced wait-state handshaking. See the “Autoselect Com-  
mand Sequence” section for more information.  
October 1, 2003 27243B1  
Am29BDS320G  
27