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AM26LV400BB-55REE 参数 Datasheet PDF下载

AM26LV400BB-55REE图片预览
型号: AM26LV400BB-55REE
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位( 512K的×8位/ 256千×16位) CMOS 3.0伏只引导扇区闪存 [4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 48 页 / 1129 K
品牌: SPANSION [ SPANSION ]
 浏览型号AM26LV400BB-55REE的Datasheet PDF文件第18页浏览型号AM26LV400BB-55REE的Datasheet PDF文件第19页浏览型号AM26LV400BB-55REE的Datasheet PDF文件第20页浏览型号AM26LV400BB-55REE的Datasheet PDF文件第21页浏览型号AM26LV400BB-55REE的Datasheet PDF文件第23页浏览型号AM26LV400BB-55REE的Datasheet PDF文件第24页浏览型号AM26LV400BB-55REE的Datasheet PDF文件第25页浏览型号AM26LV400BB-55REE的Datasheet PDF文件第26页  
D A T A S H E E T  
WRITE OPERATION STATUS  
The device provides several bits to determine the sta-  
tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7,  
and RY/BY#. Table 6 and the following subsections  
describe the functions of these bits. DQ7, RY/BY#,  
and DQ6 each offer a method for determining whether  
a program or erase operation is complete or in  
progress. These three bits are discussed first.  
Table 6 shows the outputs for Data# Polling on DQ7.  
Figure 5 shows the Data# Polling algorithm.  
START  
DQ7: Data# Polling  
Read DQ7–DQ0  
Addr = VA  
The Data# Polling bit, DQ7, indicates to the host sys-  
tem whether an Embedded Algorithm is in progress or  
completed, or whether the device is in Erase Suspend.  
Data# Polling is valid after the rising edge of the final  
WE# pulse in the program or erase command se-  
quence.  
Yes  
DQ7 = Data?  
During the Embedded Program algorithm, the device  
outputs on DQ7 the complement of the datum pro-  
grammed to DQ7. This DQ7 status also applies to pro-  
gramming during Erase Suspend. When the  
Embedded Program algorithm is complete, the device  
outputs the datum programmed to DQ7. The system  
must provide the program address to read valid status  
information on DQ7. If a program address falls within a  
protected sector, Data# Polling on DQ7 is active for  
approximately 1 µs, then the device returns to reading  
array data.  
No  
No  
DQ5 = 1?  
Yes  
Read DQ7–DQ0  
Addr = VA  
During the Embedded Erase algorithm, Data# Polling  
produces a “0” on DQ7. When the Embedded Erase  
algorithm is complete, or if the device enters the Erase  
Suspend mode, Data# Polling produces a “1” on DQ7.  
This is analogous to the complement/true datum out-  
put described for the Embedded Program algorithm:  
the erase function changes all the bits in a sector to  
“1”; prior to this, the device outputs the “complement,”  
or “0.The system must provide an address within any  
of the sectors selected for erasure to read valid status  
information on DQ7.  
Yes  
DQ7 = Data?  
No  
PASS  
FAIL  
After an erase command sequence is written, if all  
sectors selected for erasing are protected, Data# Poll-  
ing on DQ7 is active for approximately 100 µs, then the  
device returns to reading array data. If not all selected  
sectors are protected, the Embedded Erase algorithm  
erases the unprotected sectors, and ignores the se-  
lected sectors that are protected.  
Notes:  
1. VA = Valid address for programming. During a sector  
erase operation, a valid address is an address within  
any sector selected for erasure. During chip erase, a  
valid address is any non-protected sector address.  
2. DQ7 should be rechecked even if DQ5 = “1” because  
DQ7 may change simultaneously with DQ5.  
When the system detects DQ7 has changed from the  
complement to true data, it can read valid data at  
DQ7–DQ0 on the following read cycles. This is be-  
cause DQ7 may change asynchronously with  
DQ0–DQ6 while Output Enable (OE#) is asserted low.  
Figure 19, Data# Polling Timings (During Embedded  
Algorithms), in the “AC Characteristics” section illus-  
trates this.  
Figure 5. Data# Polling Algorithm  
20  
Am29LV400B  
21523D4 December 4, 2006