CXD3017Q
(2) CLOK, DATA, XLAT and SQCK pin
(VDD = AVDD = 3.3 ± 0.3V, VSS = AVSS = 0V, Topr = –20 to +75°C)
Item
Clock frequency
Symbol
Min.
Typ.
Max.
0.65
Unit
MHz
ns
fCK
Clock pulse width
Setup time
t
t
t
t
t
WCK
SU
H
750
300
300
300
750
ns
Hold time
ns
Delay time
D
ns
Latch pulse width
SQCK frequency
SQCK pulse width
WL
ns
fT
0.65 Note) MHz
ns
t
WT
750 Note)
1/fCK
tWCK
tWCK
CLOK
DATA
XLAT
tH
tSU
tD
tWL
SQCK
SQSO
tWT
tWT
1/fT
tSU
tH
Note) In quasi double-speed playback mode, except when SQSO is Sub Q Read, the SQCK maximum
operating frequency is 300kHz and its minimum pulse width is 1.5µs.
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