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CXD3017Q 参数 Datasheet PDF下载

CXD3017Q图片预览
型号: CXD3017Q
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置数字伺服和DAC [CD Digital Signal Processor with Built-in Digital Servo and DAC]
分类和应用: 消费电路商用集成电路数字信号处理器
文件页数/大小: 117 页 / 1082 K
品牌: SONY [ SONY CORPORATION ]
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CXD3017Q
Pin
No.
69
70
71
72
73
74
75
76
77
78
79
80
Symbol
AV
DD
1
AOUT1
AIN1
LOUT1
AV
SS
1
AV
SS
2
LOUT2
AIN2
AOUT2
AV
DD
2
RMUT
LMUT
I/O
O
I
O
O
I
O
O
O
Output
values
Analog power supply.
L ch analog output.
L ch operational amplifier input.
L ch LINE output.
Analog GND.
Analog GND.
R ch LINE output.
Description
R ch operational amplifier output.
R ch analog output.
1, 0
1, 0
Analog power supply.
R ch zero detection flag.
L ch zero detection flag.
Notes) •
PCMD is a MSB first, two's complement output.
GTOP is used to monitor the frame sync protection status. (High: sync protection window released.)
XUGF is the frame sync obtained from the EFM signal, and is negative pulse. It is the signal before
sync protection.
XPCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the
EFM signal transition point coincide.
The GFS signal goes high when the frame sync and the insertion timing match.
RFCK is derived from the crystal accuracy, and has a cycle of 136µs.
C2PO represents the data error status.
XROF is generated when the 16K RAM exceeds the ±4F jitter margin.
Monitor Pin Output Combinations
Command bit
MTSL1
0
0
1
MTSL0
0
1
0
XUGF
MNT1
RFCK
Output data
XPCK
MNT0
XPCK
GFS
MNT3
XROF
C2PO
C2PO
GTOP
–6–