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CXD3017Q 参数 Datasheet PDF下载

CXD3017Q图片预览
型号: CXD3017Q
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置数字伺服和DAC [CD Digital Signal Processor with Built-in Digital Servo and DAC]
分类和应用: 消费电路商用集成电路数字信号处理器
文件页数/大小: 117 页 / 1082 K
品牌: SONY [ SONY CORPORATION ]
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CXD3017Q  
Contents  
§1. CPU Interface  
§1-1. CPU Interface Timing ........................................................................................................................ 13  
§1-2. CPU Interface Command Table ........................................................................................................ 13  
§1-3. CPU Command Presets .................................................................................................................... 24  
§1-4. Description of SENS Signals and Commands ................................................................................... 30  
§2. Subcode Interface  
§2-1. 80-bit Sub Q Readout ........................................................................................................................ 46  
§3. Description of Other Functions  
§3-1. Channel Clock Regeneration by the Digital PLL Circuit .................................................................... 49  
§3-2. Frame Sync Protection ...................................................................................................................... 50  
§3-3. Error Correction ................................................................................................................................. 50  
§3-4. DA Interface ....................................................................................................................................... 51  
§3-5. Digital Out .......................................................................................................................................... 53  
§3-6. Servo Auto Sequence ....................................................................................................................... 53  
§3-7. Digital CLV ......................................................................................................................................... 60  
§3-8. CD-DSP Block Playback Speed ........................................................................................................ 61  
§3-9. DAC Block Playback Speed .............................................................................................................. 61  
§3-10. Description of DAC Block Functions .................................................................................................. 62  
§3-11. LPF Block .......................................................................................................................................... 65  
§3-12. Asymmetry Compensation ................................................................................................................ 66  
§3-13. CD TEXT Data Demodulation ........................................................................................................... 67  
§4. Description of Servo Signal Processing System Functions and Commands  
§4-1. General Description of Servo Signal Processing System .................................................................. 69  
§4-2. Digital Servo Block Master Clock (MCK) ........................................................................................... 70  
§4-3. DC Offset Cancel [AVRG Measurement and Compensation] ........................................................... 71  
§4-4. E:F Balance Adjustment Function ..................................................................................................... 72  
§4-5. FCS Bias Adjustment Function .......................................................................................................... 72  
§4-6. AGCNTL Function ............................................................................................................................. 74  
§4-7. FCS Servo and FCS Search ............................................................................................................. 76  
§4-8. TRK and SLD Servo Control ............................................................................................................. 77  
§4-9. MIRR and DFCT Signal Generation .................................................................................................. 78  
§4-10. DFCT Countermeasure Circuit .......................................................................................................... 79  
§4-11. Anti-Shock Circuit .............................................................................................................................. 79  
§4-12. Brake Circuit ...................................................................................................................................... 80  
§4-13. COUT Signal ..................................................................................................................................... 81  
§4-14. Serial Readout Circuit ........................................................................................................................ 81  
§4-15. Writing to the Coefficient RAM .......................................................................................................... 82  
§4-16. PWM Output ...................................................................................................................................... 82  
§4-17. Servo Status Changes Produced by the LOCK Signal ..................................................................... 83  
§4-18. Description of Commands and Data Sets ......................................................................................... 83  
§4-19. List of Servo Filter Coefficients ........................................................................................................ 107  
§4-20. Filter Composition ............................................................................................................................ 109  
§4-21. TRACKING and FOCUS Frequency Response .............................................................................. 115  
§5. Application Circuit .................................................................................................................................. 116  
Explanation of abbreviations  
AVRG:  
Average  
AGCNTL: Auto gain control  
FCS:  
TRK:  
SLD:  
DFCT:  
Focus  
Tracking  
Sled  
Defect  
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