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CXD2510Q 参数 Datasheet PDF下载

CXD2510Q图片预览
型号: CXD2510Q
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器 [CD Digital Signal Processor]
分类和应用: 数字信号处理器
文件页数/大小: 48 页 / 710 K
品牌: SONY [ SONY CORPORATION ]
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CXD2510Q  
SENS output  
Microcomputer serial register  
value (latching not required)  
ASEQ = 0  
ASEQ = 1  
$0X  
Z
SEIN (FZC)  
SEIN (A.S)  
SEIN (T.Z.C)  
SEIN (SSTOP)  
XBUSY  
FOK  
$1X  
Z
$2X  
Z
Z
$3X  
$4X  
Z
$5X  
Z
$6X  
Z
SEIN (Z)  
GFS  
$AX  
GFS  
COMP  
COUT  
OV64  
Z
$BX  
$CX  
COMP  
COUT  
$EX  
OV64  
$7X, 8X, 9X, DX, FX  
0
Description of SENS signals  
SENS output  
Meaning  
Z
The SENS pin is high impedance.  
XBUSY  
Low while the auto sequencer is in operation, high when operation terminates.  
Outputs the same signal as the FOK pin.  
High for "focus OK".  
FOK  
GFS  
High when the played back frame sync is obtained with the correct timing.  
Measures the number of tracks set with Reg B. High when Reg B is latched, low when the  
initial Reg B number is input by CNIN.  
COMP  
Measures the number of tracks set with Reg B. High when Reg B is latched, toggles each time  
the Reg B number is input by CNIN. While $44 and $45 are being executed, toggles with each  
CNIN 8-count instead of the Reg B number.  
COUT  
OV64  
Low when the EFM signal, after passing through the sync detection filter, is lengthened by  
64 channel clock pulses or more.  
Command bit  
DPLL = 0  
DPLL = 1  
Meaning  
RFPLL is analog. PDO, VCOI and VCOO are used.  
RFPLL is digital. PDO is impedance.  
External parts for Pins 18 to 20 are required even when analog PLL is selected.  
Command bit  
BiliGL SUB = 0  
BiliGL SUB = 1  
BiliGL MAIN = 0 BiliGL MAIN = 1  
STEREO  
SUB  
MAIN  
Mute  
Definition of bilingual capable MAIN, SUB and STEREO:  
The left channel input is output to the left and right channels for MAIN.  
The right channel input is output to the left and right channels for SUB.  
The left and right channel inputs are output to the left and right channels for STEREO.  
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