CXA2108AQ
Reference
Pin
No.
Symbol
XCS
Equivalent circuit
Description
I/O voltage
level
Internal RAM chip select.
Internal RAM access is enabled by
inputting low level. (See Table 1.
Read/Write Switching Condition
Correspondence Table.)
47
50
48
I
I
I
CMOS
Internal RAM read/write select.
Write mode is selected for high level, and
read mode for low level. See Table 1.
Read/Write Switching Condition
Correspondence Table for the actual
read/write switching signal input conditions.
CMOS
CMOS
XR/W
XWR
DVCC
Write clock input.
46 47 48
49 50
This pin is used to input the clock for
writing the luminance, brightness and
drive current data. It is not
synchronized with CLK.
DGND
Read clock input.
This pin is used to input the clock for
externally reading the luminance,
brightness and drive current data. It is
not synchronized with CLK.
49
46
I
I
CMOS
CMOS
XRD
DLDI
Trigger signal input for luminance data
RAM (A)/(B) switching and PWM
output start.
(See the Timing Charts.)
Voltage supply terminal for cathode of
positive protection diode which
connected to drivers (IOUTO to
IOUT23) and REXT (55pin).
Normally,connect to LED DC supply.
However ,when the LED DC supply
voltage exceeds 10V,VPD must be set
10V or less.
5V (Typ.)
10
VPD
—
– 5 –
SONY [ SONY CORPORATION ]
