CXA2108AQ
Electrical Characteristics
(AVCC, DVCC = +5V, VPD = +10V, AGND, DGND, IGND = 0V)
Conditions
Max.
Item
Symbol
Min.
Typ.
Unit
Driver block
PWM reference clock frequency fCLK
MHz
mV
15
REXT pin voltage
VREXT
1300
Rext = 2kΩ
1235
0
1365
VREXT (@AVCC = 5.25V)
– VREXT (@AVCC = 4.75V)
REXT pin voltage
Supply voltage dependency
∆VREXT
mV
20
30
Rext = 2kΩ, D8 = D9 = 0
Note) Excluding the driver block
Standby supply current
ICC
20
mA
bit
PWM output resolution
Drive current setting resolution
Coarse Adj.
10
2
8
bit
bit
Fine Adj.
Io (FFh) = 60mA
(D0 [LSB] to D7 [MSB] = FFh)
DC characteristics
Differential linearity error
DLE
±0.8
LSB
70
mA
V
Output current
IOUT
Io = 0 to 70mA
1
VPD + 0.3
Output compliance voltage Vcmp
Logic block
Digital input current (I, I/O)
(H)
VIN = 5V
VIN = 0V
–5
–5
5
5
µA
µA
IIH
IIL
(L)
Digital input voltage (I, I/O)
(H)
VIH
VIL
0.7DVCC
–0.3
DVCC + 0.3
0.3DVCC
V
V
(L)
Digital output voltage (O)
(H)
VOH
VOL
DVCC = 5V, IOH = –2mA
DVCC = 5V, IOL = 4mA
4
V
V
(L)
0.4
0.4
Digital output voltage (I/O)
(H)
3.7
VOZH
VOZL
DVCC = 5V, IOH = –2mA
DVCC = 5V, IOL = 4mA
V
V
(L)
RAM write mode
Write cycle
ns
ns
TWR
133.3
55
Write pulse width
Setup time
TCWR
TSWR
THWR
10
ns
ns
Hold time
10
RAM read mode
Read cycle
Read pulse width
Setup time
ns
ns
ns
ns
ns
TRD
133.3
55
TCRD
TSRD
THRD
TPDD
10
Hold time
10
Output load 50pF or less
100
Output delay time
– 9 –
SONY [ SONY CORPORATION ]
