CXA2108AQ
Pin Description
Reference
I/O voltage
level
Pin
Symbol
No.
Equivalent circuit
Description
Analog GND.
9, 56
—
—
—
—
AGND
GND
8, 57
AVCC
5V (Typ.)
GND
Analog power supply.
Digital GND.
12, 22, 42
DGND
23, 43
DVCC
5V (Typ.)
Digital power supply.
5, 60,
66, 70,
75, 79
—
—
I
GND
GND for driver output.
Open.
This pin is not connected with the
internal circuits.
IGND
53, 54 NC
Clock input.
Driver operation is synchronized with
this clock.
CLK
CMOS
CMOS
21
51
Reset input.
The IC is initialized by inputting low
level. However, the memory is not
initialized. Input high level during
normal operation.
XRST
I
DVCC
Output mode switching.
21 51 11
Upper/Lower mode for low level input.
Upper/Lower/RGB mode for high level
input. (See the Description of Operation.)
11
34 35 36
I
I
I
CMOS
CMOS
CMOS
MODE
A0 to 8
A9
37 38 39
40 41 44 45
Address input.
DGND
34 to 41,
44
These pins are used to input the internal
RAM (luminance data, brightness data
and drive current data RAM) address.
RAM selection.
The luminance data RAM is selected
when this pin is low, and the drive
current data RAM when high.
45
DVCC
Data I/O.
These pins are used to input and
output data to and from the internal
RAM (luminance data, brightness data
and drive current data RAM). See
Table 1. Read/Write Switching
Condition Correspondence Table for
the data I/O switching conditions.
DGND
DVCC
CMOS
24 to 33 D0 to 9 I/O
24 25 26
27 28 29
30 31 32 33
DGND
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