CXA1616N/S
Pin No.
Symbol Pin voltage
Description
Equivalent circuit
SDIP SSOP
VCC
10
56k
2.7V
Clamp pulse output.
This is an open collector at positive
polarity.
10k
5k
10
11
10
11
CLAMP
GND
0.15V
0V
—
GND
VCC
20
Reference for the vertical sync
separator circuit.
Connect an external resistance
between Vcc and GND to apply the
reference voltage.
12
14
1k
1k
(
)
12
V REF
—
0.12, 4.5V
0.15V
14
(
)
22
30µA
4.5V
16k
36k
Based on 4.4V. (See Fig. 2)
20k
13
14
15
16
17
15
16
17
18
19
IN/EXT
EH
EV
PH
PV
13 14
Outputs the polarity and existence
information of a sync signal.
See "Description of Operation" for
their l/O matrix.
15 16 17
15 16
8k
19
17 18
VCC
18
8k
8k
HD (H Drive Pulse) output.
This is an open collector at positive
polarity.
18
20
HD
8k
(
)
20
10k
VCC
45k
15k
Outputs the sync signal separated
from the composite sync or sync-on
video for the vertical sync separator.
Positive polarity output at an amplitude
of 2.3 to 6.0V.
19
21
19
21
V OUT
2.3V
(
)
2k
60k
– 5 –
SONY [ SONY CORPORATION ]
