SNAD02C
8-CHANNEL 10-BIT ADC
4. BLOCK DIAGRAM
VDD
D
AVDD
1.2V Bandgap
Reference
VRH
CH0/DI0
Serial
CH1/DI1
CH2/DI2
8-Channels
Analog/Digital
Input MUX
Interface
START
12 Bit SAR
ADC
CH3/DI3
CLK
and
CH4/DI4
DIO
Control
CH5/DI5
CH6/DI6
Logic
CH7(BAT)/DI7
AVSS
VSSD
Figure-1 Block diagram of ADC
5. PIN ASSIGNMENTS
Pin Name
CH[7] ~ CH[0]
REF
I/O
Description
Analog input / digital input
I
I
I
I
I
I
I
I
Reference voltage of analog signal
Positive power
VDD
VSS
Negative power
AVDD
Positive power of analog circuit
Negative power of analog circuit
Command initialization signal (from host controller)
AVSS
START
CLK
Clock of data communication and AD conversion (from
host controller)
DIO
IO
Data input and output of data communication
Table-1
Version: 1.3
July 31, 2003
4
SONIX [ SONIX TECHNOLOGY COMPANY ]
