SNAD02C
8-CHANNEL 10-BIT ADC
4. BLOCK DIAGRAM
AVDD
VDD
D
1.2V Bandgap
Reference
VRH
CH0/DI0
CH1/DI1
CH2/DI2
CH3/DI3
CH4/DI4
CH5/DI5
CH6/DI6
CH7(BAT)/DI7
8-Channels
Analog/Digital
Input MUX
12 Bit SAR
ADC
Serial
Interface
and
Control
Logic
START
CLK
DIO
AVSS
VSSD
Figure-1 Block diagram of ADC
5. PIN ASSIGNMENTS
Pin Name
CH[7] ~ CH[0]
REF
VDD
VSS
AVDD
AVSS
START
CLK
DIO
I/O
I
I
I
I
I
I
I
I
IO
Description
Analog input / digital input
Reference voltage of analog signal
Positive power
Negative power
Positive power of analog circuit
Negative power of analog circuit
Command initialization signal (from host controller)
Clock of data communication and AD conversion (from
host controller)
Data input and output of data communication
Table-1
Version: 1.3
4
July 31, 2003