Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
4.9
Regulator Output Voltages and Capacitor Requirement
Table 4.9 Regulator Output Voltages and Capacitor Requirement
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Regulator Output Voltage
Regulator Output Voltage
VDD33
VDD33
6V > VBAT > 3.1V
3.0
2.7
3.3
3.0
3.6
3.3
V
V
USB UART Mode & UART
RegOutput[1:0] = 01
6V > VBAT > 3.1V
Regulator Output Voltage
Regulator Output Voltage
VDD33
USB UART Mode & UART
RegOutput[1:0] = 10
6V > VBAT > 3.1V
2.47
2.25
2.2
2.75
2.5
3.03
2.75
V
V
VDD33
USB UART Mode & UART
RegOutput[1:0] = 11
6V > VBAT > 3.1V
Regulator Bypass Capacitor
Bypass Capacitor ESR
COUT
CESR
uF
1
Ω
Table 4.10 ESD and LATCH-UP Performance
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
COMMENTS
ESD PERFORMANCE
Note 4.9
System
Human Body Model
±8
±8
kV
kV
Device
EN/IEC 61000-4-2 Contact
Discharge
3rd party system test
System
EN/IEC 61000-4-2 Air-gap
Discharge
±15
kV
3rd party system test
LATCH-UP PERFORMANCE
All Pins
EIA/JESD 78, Class II
150
mA
Note 4.9 REFCLK, XO, SPK_L and SPK_R pins: ±5kV Human Body Model.
SMSC USB3320
Revision 1.0 (07-14-09)
DATA2S1HEET
SMSC [ SMSC CORPORATION ]
