6.7 Parallel Port
The LPC47S45x incorporates an IBM XT/AT compatible parallel port. This supports the optional PS/2 type bi-directional
parallel port (SPP), the Enhanced Parallel Port (EPP) and the Extended Capabilities Port (ECP) parallel port modes.
Refer to the Configuration Registers for information on disabling, power down, changing the base address of the parallel
port, and selecting the mode of operation.
The LPC47S45x also provides a mode for support of the floppy disk controller on the parallel port.
The parallel port also incorporates SMSC's ChiProtect circuitry, which prevents possible damage to the parallel port due
to printer power-up.
The functionality of the Parallel Port is achieved through the use of eight addressable ports, with their associated
registers and control gating. The control and data port are read/write by the CPU, the status port is read/write in the EPP
mode. The address map of the Parallel Port is shown below
DATA PORT
BASE ADDRESS + 00H
BASE ADDRESS + 01H
BASE ADDRESS + 02H
BASE ADDRESS + 03H
BASE ADDRESS + 04H
BASE ADDRESS + 05H
BASE ADDRESS + 06H
BASE ADDRESS + 07H
STATUS PORT
CONTROL PORT
EPP ADDR PORT
EPP DATA PORT 0
EPP DATA PORT 1
EPP DATA PORT 2
EPP DATA PORT 3
The bit map of these registers is:
D0
PD0
D1
PD1
0
D2
PD2
0
D3
D4
D5
PD5
PE
D6
D7
Note
DATA PORT
PD3
PD4
PD6
PD7
1
1
STATUS
PORT
TMOUT
nERR
SLCT
nACK nBUSY
CONTROL
PORT
STROBE AUTOFD nINIT
SLC
PD3
PD3
PD3
PD3
PD3
IRQE
PD4
PD4
PD4
PD4
PD4
PCD
PD5
PD5
PD5
PD5
PD5
0
0
1
2
2
2
2
2
EPP ADDR
PORT
PD0
PD0
PD0
PD0
PD0
PD1
PD1
PD1
PD1
PD1
PD2
PD2
PD2
PD2
PD2
PD6
PD6
PD6
PD6
PD6
PD7
PD7
PD7
PD7
PD7
EPP DATA
PORT 0
EPP DATA
PORT 1
EPP DATA
PORT 2
EPP DATA
PORT 3
Note 1: These registers are available in all modes.
Note 2: These registers are only available in EPP mode.
SMSC DS – LPC47S45x
Page 77 of 259
Rev. 07/09/2001
DATASHEET