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LPC47M14F-NC 参数 Datasheet PDF下载

LPC47M14F-NC图片预览
型号: LPC47M14F-NC
PDF下载: 下载PDF文件 查看货源
内容描述: 128 PIN ENGANCED超级I / O与LPC接口和USB集线器控制器 [128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB]
分类和应用: 控制器PC
文件页数/大小: 205 页 / 1208 K
品牌: SMSC [ SMSC CORPORATION ]
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8
CONFIGURATION  
The Configuration of the LPC47M14x is very flexible and is based on the configuration architecture implemented in  
typical Plug-and-Play components. The LPC47M14x is designed for motherboard applications in which the resources  
required by their components are known. With its flexible resource allocation architecture, the LPC47M14x allows the  
BIOS to assign resources at POST.  
SYSTEM ELEMENTS  
Primary Configuration Address Decoder  
After a hard reset (PCI_RESET# pin asserted) or Vcc Power On Reset the LPC47M14x is in the Run Mode with all  
logical devices disabled. The logical devices may be configured through two standard Configuration I/O Ports (INDEX  
and DATA) by placing the LPC47M14x into Configuration Mode.  
The BIOS uses these configuration ports to initialize the logical devices at POST. The INDEX and DATA ports are only  
valid when the LPC47M14x is in Configuration Mode.  
The SYSOPT pin is latched on the falling edge of the PCI_RESET# or on Vcc Power On Reset to determine the  
configuration register's base address. The SYSOPT pin is used to select the CONFIG PORT's I/O address at power-up.  
Once powered up the configuration port base address can be changed through configuration registers CR26 and CR27.  
The SYSOPT pin is a hardware configuration pin which is shared with the GP24 signal on pin 45.  
Note: An external pull-down resistor is required for the base IO address to be 0x02E for configuration. An  
external pull-up resistor is required to move the base IO address for configuration to 0x04E.  
The INDEX and DATA ports are effective only when the chip is in the Configuration State.  
SYSOPT= 0  
10k PULL-DOWN  
RESISTOR  
SYSOPT= 1  
10K PULL-UP  
RESISTOR  
PORT NAME  
TYPE  
CONFIG PORT (Note)  
0x02E  
0x02E  
0x04E  
0x04E  
Write  
INDEX PORT (Note)  
DATA PORT  
Read/Write  
Read/Write  
INDEX PORT + 1  
Note : The configuration port base address can be relocated through CR26 and CR27.  
Entering the Configuration State  
The device enters the Configuration State when the following Config Key is successfully written to the CONFIG PORT.  
Config Key = <0x55>  
Exiting the Configuration State  
The device exits the Configuration State when the following Config Key is successfully written to the CONFIG PORT.  
Config Key = <0xAA>  
SMSC DS – LPC47M14X  
Page 152  
Rev. 03/19/2001  
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