Registers (Ports)
The run-time registers in the MPU-401 Host Interface are shown below in Table 33.
TABLE 33 - MPU-401 HOST INTERFACE REGISTERS
REGISTER
NAME
ADDRESS
TYPE
DESCRIPTION
MIDI DATA
MPU-401 I/O Base Address
R/W
Used for MIDI transmit data,
MIDI receive data, and MPU-401
command acknowledge.
STATUS
MPU-401 I/O Base Address + 1
MPU-401 I/O Base Address + 1
R
Used to indicate the send/receive
status of the MIDI Data port.
Used for MPU-401 Commands.
COMMAND
MIDI Data Port
W
The MIDI Data port exchanges MIDI transmit and MIDI receive data between the MPU-401 UART
interface and the host. The MIDI Data port is read/write (Table 34). The MIDI Data port is also used to
return the command acknowledge byte ‘FEh’ following host writes to the COMMAND port.
The MIDI Data port is full-duplex; i.e., the transmit and receive buffers can be used simultaneously.
An interrupt is generated when either MIDI receive data or a command acknowledge is available to the
host in the MIDI Data register. See Section “Bit 7 – MIDI Receive Buffer Empty” and “Interrupt”
TABLE 34 - MIDI DATA PORT
MPU-401 I/O BASE ADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
DEFAULT
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
n/a
NAME
MIDI DATA/COMMAND-ACKNOWLEDGE REGISTER
Status Port
The Status port is used to indicate the state of the transmit and receive buffers in the MIDI Data port.
The Status port is read-only (Table 35). Status port Bit 6 is MIDI Transmit Busy, Bit 7 is MIDI Receive
Buffer Empty. The remaining bits in the Status port are RESERVED.
TABLE 35 - MPU-401 STATUS PORT
MPU-401 I/O BASE ADDRESS+1
D7
R
D6
R
D5
R
D4
R
D3
R
D2
R
D1
R
D0
R
DEFAULT
TYPE
BIT
0x80
0
0
0
0
0
0
MIDI RX MIDI TX
NAME
BUFFE
R
BUSY
EMPTY
Bit 7 – MIDI Receive Buffer Empty
Bit 7 MIDI Receive Buffer Empty indicates the read state of the MIDI Data port (Table 36). If the MRBE
bit is ‘0’, MIDI Read/Command Acknowledge data is available to the host. If the MRBE bit is ‘1’, MIDI
Read/Command Acknowledge data is NOT available to the host.
The MPU-401 Interrupt output is active ‘1’ when the MIDI Receive Buffer Empty bit is ‘0’. The MPU-401
Interrupt output is inactive ‘0’ when the MIDI Receive Buffer Empty bit is ‘1’. See Section “Interrupt” for
more information.
TABLE 36 - MIDI RECEIVE BUFFER EMPTY STATUS BIT
STATUS PORT
D7
DESCRIPTION
MIDI Read/Command Acknowledge data is
available to the host.
0
1
MIDI Read/Command Acknowledge data is
NOT available to the host.
SMSC LPC47B27x
- 71 -
Rev. 08-10-04
DATASHEET
SMSC [ SMSC CORPORATION ]
