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LAN9313I 参数 Datasheet PDF下载

LAN9313I图片预览
型号: LAN9313I
PDF下载: 下载PDF文件 查看货源
内容描述: 三端口10/100管理型以太网交换机MII [Three Port 10/100 Managed Ethernet Switch with MII]
分类和应用: 以太网局域网(LAN)标准
文件页数/大小: 398 页 / 4083 K
品牌: SMSC [ SMSC CORPORATION ]
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Three Port 10/100 Managed Ethernet Switch with MII  
Datasheet  
BITS  
DESCRIPTION  
TYPE  
DEFAULT  
18  
EEPROM Loader Address Overflow (LOADER_OVERFLOW)  
This bit indicates that the EEPROM Loader tried to read past the end of the  
EEPROM address space. This indicates misconfigured EEPROM data.  
RO  
0b  
This bit is cleared when the EEPROM Loader is restarted with a RELOAD  
command, or a Digital Reset(DIGITAL_RST).  
17  
EEPROM Controller Timeout (EPC_TIMEOUT)  
R/WC  
0b  
This bit is set when a timeout occurs, indicating the last operation was  
unsuccessful. If an EEPROM ERASE, ERAL, WRITE or WRAL operation is  
performed and no response is received from the EEPROM within 30mS, the  
EEPROM controller will timeout and return to its idle state.  
2
For the I C mode, the bit is also set if the EEPROM fails to respond with  
the appropriate ACKs, if the EEPROM slave device holds the clock low for  
more than 30ms, or if an unsupported EPC_COMMAND is attempted.  
This bit is cleared when written high.  
Note:  
When in Microwire mode, if an EEPROM device is not connected,  
an internal pull-down on the EEDI pin will keep the EEDI signal low  
and allow timeouts to occur. If EEDI is pulled high externally, EPC  
commands will not time out if an EEPROM device is not connected.  
In this case the EPC_BUSY bit will be cleared as soon as the  
command sequence is complete. It should also be noted that the  
ERASE, ERAL, WRITE and WRAL commands are the only EPC  
commands that will timeout if an EEPROM device is not present  
AND the EEDI signal is pulled low.  
16  
Configuration Loaded (CFG_LOADED)  
RO  
0b  
When set, this bit indicates that a valid EEPROM was found and the  
EEPROM Loader completed normally. This bit is set upon a successful load.  
It is cleared on power-up, pin and DIGITAL_RST resets, or at the start of a  
RELOAD.  
This bit is cleared when written high.  
15:0  
EEPROM Controller Address (EPC_ADDRESS)  
This field is used by the EEPROM Controller to address a specific memory  
location in the serial EEPROM. This address must be byte aligned.  
R/W  
0000h  
Revision 1.2 (04-08-08)  
162  
SMSC LAN9313/LAN9313i  
DATASHEET  
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