Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Chapter 13 Register Descriptions
This section describes the various LAN9313/LAN9313i control and status registers (CSR’s). These
registers are broken into 3 categories. The following sections detail the functionality and accessibility
of all the LAN9313/LAN9313i registers within each category:
Section 13.1, "System Control and Status Registers," on page 147
Section 13.2, "Ethernet PHY Control and Status Registers," on page 231
Section 13.3, "Switch Fabric Control and Status Registers," on page 253
Figure 13.1 contains an overall base register memory map of the LAN9313/LAN9313i. This memory
map is not drawn to scale, and should be used for general reference only.
Note: Register bit type definitions are provided in Section 1.3, "Register Nomenclature," on page 17.
Note: Not all LAN9313/LAN9313i registers are memory mapped or directly addressable. For details
on the accessibility of the various LAN9313/LAN9313i registers, refer the register sub-sections
listed above.
3FFh
...
RESERVED
2E0h
2DCh
Switch CSR Direct Data
...
Registers
200h
1DCh
Virtual PHY Registers
1C0h
1B0h
1ACh
Switch Interface Registers
19Ch
1588 Registers
100h
PHY Management Interface
Registers
0A8h
0A4h
050h
04Ch
RESERVED
Base
+
000h
Figure 13.1 LAN9313/LAN9313i Base Register Memory Map
Revision 1.2 (04-08-08)
146
SMSC LAN9313/LAN9313i
DATASHEET
SMSC [ SMSC CORPORATION ]
