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LAN9210 参数 Datasheet PDF下载

LAN9210图片预览
型号: LAN9210
PDF下载: 下载PDF文件 查看货源
内容描述: 外形小巧单芯片以太网控制器与HP Auto-MDIX的 [Small Form Factor Single- Chip Ethernet Controller with HP Auto-MDIX]
分类和应用: 控制器以太网
文件页数/大小: 458 页 / 4618 K
品牌: SMSC [ SMSC CORPORATION ]
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface  
Datasheet  
14.5.3.8  
Switch Engine VLAN Command Register (SWE_VLAN_CMD)  
Register #:  
180Bh  
Size:  
32 bits  
This register is used to read and write the VLAN or Port VID tables. A write to this address performs  
the specified access.  
For a read access, the Operation Pending bit in the Switch Engine VLAN Command Status Register  
(SWE_VLAN_CMD_STS) indicates when the command is finished. The Switch Engine VLAN Read  
Data Register (SWE_VLAN_RD_DATA) can then be read.  
For a write access, the Switch Engine VLAN Write Data Register (SWE_VLAN_WR_DATA) register  
should be written first. The Operation Pending bit in the Switch Engine VLAN Command Status  
Register (SWE_VLAN_CMD_STS) indicates when the command is finished.  
BITS  
DESCRIPTION  
TYPE  
DEFAULT  
31:6  
5
RESERVED  
VLAN RnW  
RO  
-
R/W  
0b  
This bit specifies a read(1) or a write(0) command.  
4
PVIDnVLAN  
R/W  
R/W  
0b  
0h  
When set, this bit selects the Port VID table. When cleared, this bit selects  
the VLAN table.  
3:0  
VLAN/Port  
This field specifies the VLAN(0-15) or port(0-2) to be read or written.  
Note:  
Values outside of the valid range may cause unexpected results.  
Revision 1.2 (04-08-08)  
376  
SMSC LAN9312  
DATASHEET  
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