High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.2.40 Port x MAC Transmit Single Collision Count Register (MAC_TX_SNGLECOL_CNT_x)
Register #:
Port0: 0461h
Port1: 0861h
Port2: 0C61h
Size:
32 bits
This register provides a counter of transmitted packets which experienced exactly 1 collision. The
counter is cleared upon being read.
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
TX Excessive Collision
Count of transmitted packets that experienced exactly 1 collision. This
counter is incremented only in half-duplex operation.
RC
00000000h
Note:
This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 573 hours.
Revision 1.2 (04-08-08)
362
SMSC LAN9312
DATASHEET
SMSC [ SMSC CORPORATION ]
