High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
BITS
DESCRIPTION
TYPE
DEFAULT
3
Auto-Negotiation Ability
This bit indicates the status of the PHY’s auto-negotiation.
RO
1b
0: PHY is unable to perform auto-negotiation
1: PHY is able to perform auto-negotiation
2
1
0
Link Status
RO/LL
RO/LH
RO
0b
0b
1b
This bit indicates the status of the link.
0: Link is down
1: Link is up
Jabber Detect
This bit indicates the status of the jabber condition.
0: No jabber condition detected
1: Jabber condition detected
Extended Capability
This bit indicates whether extended register capability is supported.
0: Basic register set capabilities only
1: Extended register set capabilities
Note 14.52 The PHY supports 100BASE-TX (half and full duplex) and 10BASE-T (half and full duplex)
only. All other modes will always return as 0 (unable to perform).
SMSC LAN9312
291
Revision 1.2 (04-08-08)
DATASHEET