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LAN9210 参数 Datasheet PDF下载

LAN9210图片预览
型号: LAN9210
PDF下载: 下载PDF文件 查看货源
内容描述: 外形小巧单芯片以太网控制器与HP Auto-MDIX的 [Small Form Factor Single- Chip Ethernet Controller with HP Auto-MDIX]
分类和应用: 控制器以太网
文件页数/大小: 458 页 / 4618 K
品牌: SMSC [ SMSC CORPORATION ]
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface  
Datasheet  
BITS  
DESCRIPTION  
TYPE  
DEFAULT  
6
MF Preamble Suppression  
This bit indicates whether the Virtual PHY accepts management frames with  
the preamble suppressed.  
RO  
0b  
0: Management frames with preamble suppressed not accepted  
1: Management frames with preamble suppressed accepted  
5
4
3
2
1
0
Auto-Negotiation Complete  
RO  
RO  
RO  
RO  
RO  
RO  
1b  
This bit indicates the status of the Auto-Negotiation process.  
Note 14.20  
0: Auto-Negotiation process not completed  
1: Auto-Negotiation process completed  
Remote Fault  
0b  
This bit indicates if a remote fault condition has been detected.  
Note 14.21  
0: No remote fault condition detected  
1: Remote fault condition detected  
Auto-Negotiation Ability  
This bit indicates the status of the Virtual PHY’s auto-negotiation.  
1b  
0: Virtual PHY is unable to perform auto-negotiation  
1: Virtual PHY is able to perform auto-negotiation  
Link Status  
This bit indicates the status of the link.  
1b  
Note 14.21  
0: Link is down  
1: Link is up  
Jabber Detect  
This bit indicates the status of the jabber condition.  
0b  
Note 14.21  
0: No jabber condition detected  
1: Jabber condition detected  
Extended Capability  
This bit indicates whether extended register capability is supported.  
1b  
Note 14.22  
0: Basic register set capabilities only  
1: Extended register set capabilities  
Note 14.17 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on  
a DWORD boundary. When accessed serially (through the MII management protocol), the  
register is 16-bits wide.  
Note 14.18 The Virtual PHY supports 100BASE-X (half and full duplex) and 10BASE-T (half and full  
duplex) only. All other modes will always return as 0 (unable to perform).  
Note 14.19 The Virtual PHY does not support Register 15 or 1000 Mb/s operation. Thus this bit is  
always returned as 0.  
Note 14.20 The Auto-Negotiation Complete bit is first cleared on a reset, but set shortly after (when  
the Auto-Negotiation process is run). Refer to Section 7.3.1, "Virtual PHY Auto-  
Negotiation," on page 96 for additional details.  
Note 14.21 The Virtual PHY never has remote faults, its link is always up, and does not detect jabber.  
Note 14.22 The VIrtual PHY supports basic and some extended register capability. The Virtual PHY  
supports Registers 0-6 (per the IEEE 802.3 specification).  
SMSC LAN9312  
249  
Revision 1.2 (04-08-08)  
DATASHEET  
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