Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
COLLP
COLLN
t42
t43
COL
(internal)
Parameter
min
typ
max
units
t42
t43
Collision Turn On Delay
Collision Turn Off Delay
50
350
ns
ns
Figure 12.24 – Collision Timing (AUI)
POINTER
REGISTER
DATA
REGISTER
ADDRESS
nIOWR
t44
nIORD
IOCHRDY/
nWAIT (Z)
Parameter
min
typ
max
units
t44
Pointer Register Reloaded to a Word of Data
Prefetched into Data Register
2 * t20
ns
Note: If t44 is not met, IOCHRDY will be negated for the required time. This parameter can be ignored if
IOCHRDY is connected to the system.
Figure 12.25 – Memory Read Timing
SMSC DS – LAN91C965v&3v
Page 121
Rev. 09/10/2004
DATASHEET