10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
0ns
50ns
100ns
150ns
200ns
250
Asynchronous Cycle -- Using nADS
t9
valid
Addr,AEN,nBE[1:0]
nADS
t8
t3
t4
valid
Read Data
t6
t1
t5
nRD,nWR
Write Data
t5A
valid
Figure 14.2 Asynchronous Cycle - Using nADS
PARAMETER
MIN
TYP
MAX
UNITS
t1
t3
A1-A15, AEN, nBE[3:0] Valid to nRD, nWR Active
nRD Low to Valid Data
2
ns
ns
ns
ns
ns
ns
ns
ns
15
15
t4
nRD High to Data Invalid
2
t5
t5A
t6
Data Setup to nWR Inactive
10
5
Data Hold After nWR Inactive
nRD Strobe Width
15
8
t8
t9
A1-A15, AEN, nBE[3:0] Setup to nADS Rising
A1-A15, AEN, nBE[3:0] Hold after nADS Rising
5
Revision 1.8 (07-13-05)
126
SMSC LAN91C111-REV B
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