10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Chapter 3 Block Diagrams
The diagram shown in Figure 3.1 - Basic Functional Block Diagram, describes the device basic functional
blocks. The SMSC LAN91C111 is a single chip solution for embedded designs with minimal Host and
external supporting devices required to implement 10/100 Ethernet connectivity solutions.
The optional Serial EEPROM is used to store information relating to default IO offset parameters as well as
which of the Interrupt line are used by the host.
LAN91C111
Ethernet
MAC
PHY
Core
Internal IEEE 802.3 MII (Media
Independent Interface)
ISA,Embedded
Processor
RJ45
Transformer
TX/RX Buffer (8K)
Serial
EEProm
(Optional)
Minimal LAN91C111
Configuration
Figure 3.1 - Basic Functional Block Diagram
Rev. 1.4 (12-12-03)
Page 10
SMSC LAN91C111 Rev. B
DATASHEET
SMSC [ SMSC CORPORATION ]
