I/O SPACE
The base I/O space is determined by the IOS0-2
inputs and the EEPROM contents. To limit the
I/O space requirements to 16 locations, the
registers are assigned to different banks. The
last word of the I/O area is shared by all banks
and can be used to change the bank in use.
Registers are described using the following
convention:
OFFSET
NAME
TYPE
SYMBOL
HIGH
BYTE
bit 15
bit14
bit 13
bit 12
bit 11
bit 10
bit9
bit8
X
X
X
X
X
X
X
X
LOW
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
BYTE
X
X
X
X
X
X
X
X
OFFSET Defines the address offset within the
IOBASE where the register can be accessed at,
provided the bank select has the appropriate
value.
Some registers (like the Interrupt Ack., or like
Interrupt Mask) are functionally described as
two eight bit registers, in that case the offset of
each one is independently specified.
The offset specifies the address of the even byte
(bits 0-7) or the address of the complete word.
Regardless of the functional description, all
registers can be accessed as doublewords,
words or bytes.
The odd byte can be accessed using address
(offset + 1).
The default bit values upon hard reset are
highlighted below each register.
Table 2 - Internal I/O Space Mapping
BANK0
TCR
BANK1
CONFIG
BASE
IA0-1
BANK2
MMU COMMAND
PNR/ARR
FIFO PORTS
POINTER
DATA
BANK3
MT0-1
0
2
4
6
8
A
EPH STATUS
RCR
MT2-3
MT4-5
COUNTER
MIR
IA2-3
MT6-7
IA4-5
MGMT
REVISION
MCR
GENERAL
PURPOSE
DATA
C
E
RESERVED (0)
BANK SELECT
CONTROL
INTERRUPT
ERCV
BANK SELECT
BANK SELECT
BANK SELECT
A special BANK (BANK7) exists to support the addition of external registers.
21
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