High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Chapter 2 Pin Description and Configuration
RXD0
SPEED_SEL
NC
IRQ
NC
PME
EECLK**
EECS
EEDIO**
GND_CORE
VDD_CORE
D0
GND_CORE
VREG
VDD_CORE
VSS_PLL
XTAL2
XTAL1
VDD_PLL
VDD_REF
ATEST
RBIAS
VSS_REF
A7
1
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
SMSC
D1
D2
A6
LAN9117
A5
A4
VDD_IO
GND_IO
D3
A3
100 PIN TQFP
A2
D4
A1
D5
GND_IO
VDD_IO
TX_EN
RXD1
D6
VDD_IO
GND_IO
D7
RXD2
RXD3
RX_ER
D8
D9
**Denotes a multifunction pin
*1 This NC pin can also be tied to VDD_A for backward compatibility
*2 This NC pin can also be tied to VSS_A for backward compatibility
Figure 2.1 Pin Configuration
Revision 1.1 (05-17-05)
SMSC LAN9117
DATA1S4HEET