High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
System Memory
System Memory
System
Peripherals
Optional
Optional
External
PHY
Magnetics
MII
Ethernet
Embedded
LAN9117
Magnetics
System Bus
Microprocessor/
Microcontroller
LEDS/GPIO
25MHz
XTAL
EEPROM
(Optional)
Figure 1.1 System Block Diagram Utilizing the SMSC LAN9117
The SMSC LAN9117 integrated 10/100 MAC/PHY controller is a peripheral chip that performs the
function of translating parallel data from a host controller into Ethernet packets. The LAN9117 Ethernet
MAC/PHY controller is designed and optimized to function in an embedded environment. All
communication is performed with programmed I/O transactions using the simple SRAM-like host
interface bus.
The diagram shown above, describes a typical system configuration of the LAN9117 in a typical
embedded environment.
The LAN9117 is a general purpose, platform independent, Ethernet controller. The LAN9117 consists
of four major functional blocks. The four blocks are:
■
■
■
■
10/100 Ethernet PHY
10/100 Ethernet MAC
RX/TX FIFOs
Host Bus Interface (HBI)
Revision 1.1 (05-17-05)
SMSC LAN9117
DATA1S0HEET
SMSC [ SMSC CORPORATION ]
