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FDC37CXFR 参数 Datasheet PDF下载

FDC37CXFR图片预览
型号: FDC37CXFR
PDF下载: 下载PDF文件 查看货源
内容描述: 即插即用兼容超I / O控制器,提供快速IR [Plug and Play Compatible Ultra I/O Controller with Fast IR]
分类和应用: 控制器
文件页数/大小: 258 页 / 898 K
品牌: SMSC [ SMSC CORPORATION ]
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system upon return of power if the Alarm 2 time  
has passed during loss of power. These bits  
function as follows:  
code is set in the year, month, date, day and  
hours alarm byte. An alarm is generated every  
minute with “don’t care” codes in the year,  
month, date, day, hours and minutes alarm  
bytes. The “don’t care” codes in all seven alarm  
bytes creates an interrupt every second. As a  
final example, an alarm is generated every one  
of a certain day of the week, i.e., every Friday,  
by specifying the “don’t care” code in the year,  
month and date of month bytes.  
If VTR is present: AL2_EN controls whether or  
not alarm 2 is enabled as a wake-up function. If  
AL2_EN is set and VTR=5V, the nPowerOn pin  
will go active (low) when the date/time is equal  
to the alarm 2 date/time and the power supply  
will turn on the machine.  
Update Cycle  
If VTR is not present: AL2_REM_EN controls  
whether or not alarm 2 will power-up the system  
upon the return of VTR, regardless of the value  
of AL2_EN. If AL2_REM_EN is set and VTR=0  
at the date/time that alarm 2 is set for, the  
nPowerOn pin will go active (low) as soon as  
VTR comes back and the machine will power-  
up.  
An update cycle is executed once per second if  
the SET bit in Register B is clear and the  
DV0-DV2 divider is not clear. The SET bit in the  
"1" state permits the program to initialize the  
time and calendar bytes by stopping an existing  
update and preventing  
occurring.  
a
new one from  
The seven alarm 2 bytes may be used in two  
ways. First, when the alarm time is written in  
the appropriate year, month, date, day, hours,  
minutes, and seconds alarm locations, the  
alarm interrupt is initiated at the specified time  
on the day of the week, on the date of the  
month, in the year if the Alarm 2 Enable bit is  
high. The second usage is to insert a “don’t  
care” state into one or more of the alarm bytes.  
The “don’t care” code is any hexadecimal byte  
from C0 to FF inclusive. That is, the two most  
significant bits of each byte, when set to “1”  
create a “don’t care” situation. An alarm is  
generated each year if the year byte is set to a  
“don’t care” condition. Similarly, an alarm is  
generated every month with “don’t care” codes  
in the year and month bytes. An alarm is  
generated on every day of every month of every  
year with “don’t care” codes in the year, month,  
date of month and day of week bytes. An alarm  
is generated each hour, every day of the month,  
every month, every year when the “don’t care”  
The primary function of the update cycle is to  
increment the seconds byte, check for overflow,  
increment the minutes byte when appropriate  
and so forth through to the year of the century  
byte. The update cycle also compares each  
alarm byte with the corresponding time byte and  
issues an alarm if a match or if a "don't care"  
code is present.  
The length of an update cycle is shown in Table  
67. During the update cycle, the time, calendar  
and alarm bytes are not accessible by the  
processor program. If the processor reads these  
locations before the update cycle is complete,  
the output will be undefined. The UIP (update in  
progress) status bit is set during the interval.  
When the UIP bit goes high, the update cycle  
will begin 244 ms later. Therefore, if a low is read  
on the UIP bit, the user has at least 244 ms  
before time/calendar data will be changed.  
151  
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