Table 12 - Internal 2-Drive Decode: Drive 0 and 1 Swapped
DRIVE SELECT
MOTOR ON OUTPUTS
DIGITAL OUTPUT REGISTER
OUTPUTS (ACTIVE LOW)
(ACTIVE LOW)
Bit 7 Bit 6 Bit 5 Bit 4 Bit1 Bit 0
nDS1
nDS0
nMTR1
nMTR0
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nBIT 5
X
X
X
1
X
X
1
X
1
X
X
0
1
X
X
X
0
0
0
1
1
X
0
1
0
1
X
0
1
1
1
1
1
0
1
1
1
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nBIT 4
X
0
0
Table 13 - External 2-to-4 Drive Decode: Drives 0 and 1 Not Swapped
DRIVE SELECT
OUTPUTS
MOTOR ON
OUTPUTS
DIGITAL OUTPUT REGISTER
(ACTIVE LOW)
(ACTIVE LOW)
nMTR1 nMTR0
Bit 7
Bit 6
X
Bit 5
X
Bit 4
1
Bit1
0
Bit 0
0
1
0
1
0
1
0
1
nDS1
nDS0
X
X
X
1
X
X
X
0
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
X
1
X
0
1
X
X
1
X
X
X
1
X
X
0
0
X
0
X
0
0
X
X
1
X
X
X
1
SMSC DS – FDC37N769
Page 22 of 137
Rev. 12/21/2000
SMSC [ SMSC CORPORATION ]
