nTRACK 0, Bit 4
Active low status of the TRK0 disk interface input.
Step, Bit 5
Active high status of the STEP output disk interface output pin.
nDRV2, Bit 6
Active low status of the DRV2 disk interface input pin, indicating that a second drive has been installed.
Interrupt Pending, Bit 7
Active high bit indicating the state of the Floppy Disk Interrupt output.
PS/2 Model 30 Interface Mode
Table 6 - SRA PS/2 Model 30 Mode
7
6
5
4
3
2
1
0
INT
DRQ
STEP F/F TRK0
nHDSEL
INDX
WP
nDIR
PENDING
RESET
0
0
0
N/A
1
N/A
N/A
1
CONDITION
nDIRECTION, Bit 0
Active low status indicating the direction of head movement. A logic “0” indicating inward direction a logic “1” outward.
Write Protect, Bit 1
Active high status of the WRITE PROTECT disk interface input. A logic “1” indicating that the disk is write protected.
The nWRITE PROTECT bit also depends upon the state of the Force Write Protect bits in the Force FDD Status
Change configuration register (see section CR17 on page 107).
Index, Bit 2
Active high status of the INDEX disk interface input.
nHEAD SELECT, Bit 3
Active low status of the HDSEL disk interface input. A logic “0” selects side 1 and a logic “1” selects side 0.
Track, Bit 4
Active high status of the TRK0 disk interface input.
Step, Bit 5
Active high status of the latched STEP disk interface output pin. This bit is latched with the STEP output going active,
and is cleared with a read from the DIR register, or with a hardware or software reset.
DMA Request, Bit 6
Active high status of the DRQ output pin. Interrupt Pending, Bit 7 Active high bit indicating the state of the Floppy
Disk Interrupt output.
STATUS REGISTER B (SRB)
Status Register B (Base Address + 1) is read-only and monitors the state of several disk interface pins in PS/2
interface mode (Table 7) and Model 30 interface mode (Table 8). SRB can be accessed at any time when in these
modes. During a read in PC/AT interface mode the data bus pins D0 - D7 are held in a high impedance state.
PS/2 Interface Mode
Table 7 - SRB PS/2 Mode
7
1
6
1
5
4
3
2
1
0
DRIVE
SEL0
WDATA
TOGGLE TOGGLE
RDATA
WGATE
MOT
EN1
MOT
EN0
RESET
1
1
0
0
0
0
0
0
CONDITION
SMSC DS – FDC37N769
Page 18 of 137
Rev. 02-16-07
DATASHEET
SMSC [ SMSC CORPORATION ]
