TABLE 36 - RESET FUNCTION
RESET CONTROL
REGISTER/SIGNAL
Interrupt Enable Register
Interrupt Identification Reg.
FIFO Control
RESET STATE
RESET
All bits low
RESET
Bit 0 is high; Bits 1 - 7 low
RESET
All bits low
Line Control Reg.
MODEM Control Reg.
Line Status Reg.
MODEM Status Reg.
TXD1, TXD2
RESET
All bits low
RESET
All bits low
RESET
All bits low except 5, 6 high
RESET
Bits 0 - 3 low; Bits 4 - 7 input
RESET
High
INTRPT (RCVR errs)
INTRPT (RCVR Data Ready)
INTRPT (THRE)
OUT2B
RESET/Read LSR
RESET/Read RBR
RESET/ReadIIR/Write THR
RESET
Low
Low
Low
High
RTSB
RESET
High
DTRB
RESET
High
OUT1B
RESET
High
RCVR FIFO
RESET/
All Bits Low
FCR1*FCR0/_FCR0
XMIT FIFO
RESET/
All Bits Low
FCR1*FCR0/_FCR0
83
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