LOGICAL DEVICE
REGISTER
ADDRESS
DESCRIPTION
STATE
(0x71,0x73) Reserved
-
not implemented.
These register
locations ignore writes and return zero when read.
DMA Channel Select
(0x74,0x75) Only 0x74 is implemented for FDC, Serial Port 2 and
Parallel port. 0x75 is not implemented and ignores
writes and returns zero when read. Refer to DMA
Channel Configuration.
C
Default = 0x04
on Vcc POR or
Reset_Drv
32-Bit Memory
(0x76-0xA8) Reserved
-
not implemented.
These register
Space Configuration
locations ignore writes and return zero when read.
Logical Device
(0xA9-0xDF) Reserved not implemented. These register
-
C
C
C
locations ignore writes and return zero when read.
Logical Device
Config.
(0xE0-0xFE) Reserved - Vendor Defined (see SMSC defined
Logical Device Configuration Registers)
Reserved
0xFF
Reserved
Note 1:A logical device will be active and powered up according to the following equation:
DEVICE ON (ACTIVE) = (Activate Bit SET or Pwr/Control Bit SET).
The Logical device's Activate Bit and its Pwr/Control Bit are linked such that setting or clearing one sets or
clears the other.
Note: If the I/O Base Addr of the logical device is not within the Base I/O range as shown in the Logical
Device I/O map, then read or write is not valid and is ignored.
Note 2. The activate bit for Logical Device 5 (Serial Port 2) is reset on Vtr POR only.
180
SMSC [ SMSC CORPORATION ]
