devices. The port is equivalent to a generic parallel
port interface and may be operated in that mode.
The port registers vary depending on the mode
field in the ecr. The table below lists these
dependencies. Operation of the devices in modes
other that those specified is undefined.
Register Definitions
The register definitions are based on the standard
IBM addresses for LPT. All of the standard printer
ports are supported. The additional registers
attach to an upper bit decode of the standard LPT
port definition to avoid conflict with standard ISA
TABLE 41 - ECP REGISTER DEFINITIONS
ADDRESS (Note 1) ECP MODES
NAME
FUNCTION
Data Register
data
+000h R/W
+000h R/W
+001h R/W
+002h R/W
+400h R/W
+400h R/W
+400h R/W
+400h R
000-001
011
All
ecpAFifo
dsr
ECP FIFO (Address)
Status Register
dcr
All
Control Register
cFifo
ecpDFifo
tFifo
010
011
110
111
111
All
Parallel Port Data FIFO
ECP FIFO (DATA)
Test FIFO
cnfgA
cnfgB
ecr
Configuration Register A
Configuration Register B
Extended Control Register
+401h R/W
+402h R/W
Note 1: These addresses are added to the parallel port base address as selected by configuration register
or jumpers.
Note 2: All addresses are qualified with AEN. Refer to the AEN pin definition.
TABLE 42 - MODE DESCRIPTIONS
MODE
000
001
010
011
100
101
110
111
DESCRIPTION*
SPP mode
PS/2 Parallel Port mode
Parallel Port Data FIFO mode
ECP Parallel Port mode
EPP mode (If this option is enabled in the configuration registers)
Reserved
Test mode
Configuration mode
*Refer to ECR Register Description
97
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