SERIAL PORT (UART)
The chip incorporates two full function UARTs.
"1". OUT2 being a logic "0" disables that UART's
interrupt. The second UART also supports IrDA
1.0, HP-SIR and ASK-IR infrared modes of
operation.
They are compatible with the NS16450, the 16450
ACE registers and the NS16C550A. The UARTS
perform serial-to-parallel conversion on received
characters and parallel-to-serial conversion on
transmit characters.
The data rates are
Note: The UARTs may be configured to share an
interrupt. Refer to the Configuration section for
more information.
independently programmable from 460.8K baud
down to 50 baud. The character options are
programmable for 1 start; 1, 1.5 or 2 stop bits;
even, odd, sticky or no parity; and prioritized
REGISTER DESCRIPTION
interrupts. The UARTs each contain
a
programmable baud rate generator that is capable
of dividing the input clock or crystal by a number
from 1 to 65535. The UARTs are also capable of
supporting the MIDI data rate. Refer to the
Configuration Registers for information on
disabling, power down and changing the base
address of the UARTs. The interrupt from a
UART is enabled by programming OUT2 of that
Addressing of the accessible registers of the Serial
Port is shown below. The configuration registers
(see Configuration section) define the base
addresses of the serial ports. The Serial Port
registers are located at sequentially increasing
addresses above these base addresses. The chip
contains two serial ports, each of which contain a
register set as described below.
UART
to
a
logic
TABLE 32 - ADDRESSING THE SERIAL PORT
DLAB*
A2
0
0
0
0
0
0
1
1
1
1
0
0
A1
0
0
0
1
1
1
0
0
1
1
0
0
A0
0
0
1
0
0
1
0
1
0
1
0
1
REGISTER NAME
Receive Buffer (read)
0
0
Transmit Buffer (write)
0
Interrupt Enable (read/write)
Interrupt Identification (read)
FIFO Control (write)
X
X
X
X
X
X
X
1
Line Control (read/write)
Modem Control (read/write)
Line Status (read/write)
Modem Status (read/write)
Scratchpad (read/write)
Divisor LSB (read/write)
Divisor MSB (read/write
1
*Note: DLAB is Bit 7 of the Line Control Register
The following section describes the operation of the registers.
69
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