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FDC37B72X_07 参数 Datasheet PDF下载

FDC37B72X_07图片预览
型号: FDC37B72X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 128引脚增强型超级I / O控制器,支持ACPI [128 Pin Enhanced Super I/O Controller with ACPI Support]
分类和应用: 控制器
文件页数/大小: 238 页 / 816 K
品牌: SMSC [ SMSC CORPORATION ]
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Wake Events  
nPME events as shown in the following table. In  
addition, these wake events set the WAK_STS  
bit if enabled (see ACPI PM1_STS2 Register  
description).  
Wake events are events that turn power on  
(activate nPowerOn output) if enabled. These  
events can also be enabled as SMI, SCI and  
INPUT TO SOFT POWER  
MANAGEMENT  
KDAT  
SMI/SCI/PME  
GENERATION  
SMI/SCI/PME  
WAKE EVENTS  
KDAT  
PINS  
MDAT  
IRRX2  
RXD2/IRRX  
RXD1  
nRI1  
MDAT  
IRRX2  
RXD2/IRRX  
RXD1  
nRI1  
nRI2  
nRING  
Button  
GPINT1  
SMI/SCI/PME  
SMI/SCI/PME  
SMI/SCI/PME  
SMI/SCI1/PME1  
SMI/SCI/PME  
SMI/SCI/PME  
SMI/SCI/PME  
SMI/SCI2/PME1  
SMI/SCI1/PME  
SMI/SCI1/PME1  
SCI  
nRI2  
nRING  
Button  
GP10-173  
GP50-54, GP60-67  
VTR POR  
GPINT2  
VTR POR  
INTERNA  
L
SIGNALS  
Note 1: These SCI/PME events are SMI events that are enabled through DEVINT_EN.  
Note 2: These SCI events have Status and Enable bits in the PM1 registers.  
Note 3: The polarity of the edge that causes the event is programmable through the polarity bit in the  
GPIO configuration registers. The default is the low-to-high edge.  
The following are SMI events that are not wake events:  
Floppy Interrupt  
Parallel Port Interrupt  
WDT  
P12  
Any wakeup logic that affects the configuration of the wakeup events is implemented so that the  
configuration of the wakeup events is retained (in the event of total power loss) upon Vtr POR.  
142  
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