Environmental Monitoring and Control Device
Datasheet
8.13 Register 7Dh: Interrupt Status Register 3
BIT 7
(MSB)
BIT 0
(LSB)
REGISTER
ADDRESS
READ/
WRITE
REGISTER
NAME
DEFAULT
VALUE
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
Interrupt
Status
7Dh
R-C1
RES
RES
RES
RES
RES
33V
18V
15V
00h
Register 3
Note 1: This register is cleared on a read if no events are active
Note: this register only applies to the EMC6D100.
The Interrupt Status Register 3 bits are automatically set by the EMC6D100 whenever the 1.5V, 1.8V, or
3.3V input voltages violate the limits set in the limit and parameter registers.
This register holds a set bit until the event is read by software. The contents of this register is cleared (set
to 0) automatically by the EMC6D100 after it is read by software, if the voltage no longer violates the limit
set in the limit and parameter register. Once set, the Interrupt Status Register 3 bits remain set until a
read event occurs, even if the voltage or temperature no longer violates the limits set in the limit and
parameter registers.
This register is read only – a write to this register has no effect.
BIT
0
NAME
+1.5v_Error
R/W
R
DEFAULT
DESCRIPTION
0
The EMC6D100 automatically sets this bit to 1 when the 1.5V
input voltage is less than or equal to the limit set in the 1.5V
Low Limit register or greater than the limit set in the 1.5V
High Limit register.
1
2
+1.8V_Error
+3.3V_Error
Reserved
R
R
R
0
0
0
The EMC6D100 automatically sets this bit to 1 when the 1.8V
input voltage is less than or equal to the limit set in the 1.8V
Low Limit register or greater than the limit set in the 1.8V
High Limit register.
The EMC6D100 automatically sets this bit to 1 when the 3.3V
input voltage is less than or equal to the limit set in the 3.3V
Low Limit register or greater than the limit set in the 3.3V
High Limit register.
3-7
Reserved
8.14 Register 43h: VID
BIT 7
(MSB)
BIT 0
(LSB)
REGISTER
ADDRESS
READ/
WRITE
REGISTER
NAME
DEFAULT
VALUE
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
43h
R
VID0-4
RES
RES
RES VID4 VID3 VID2 VID1 VID0
N/A
The VID register contains the values of EMC6D100/EMC6D101 VID0-VID4 input pins. This register
indicates the status of the VID lines that interconnect the processor to the Voltage Regulator Module
(VRM). Software uses the information in this register to determine the voltage that the processor is
designed to operate at. With this information, software can then dynamically determine the correct values
to place in the Vccp Low Limit and Vccp High Limit registers.
This register is read only – a write to this register has no effect.
SMSC EMC6D100/EMC6D101
Page 48
Rev. 09-09-04
DATASHEET
SMSC [ SMSC CORPORATION ]
