Environmental Monitoring and Control Device
Datasheet
8.16 Registers 4E-53h: Temperature Limit Registers
BIT 7
BIT 0
(LSB)
REGISTER
ADDRESS
READ/
WRITE
REGISTER
NAME
DEFAULT
VALUE
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
(MSB)
Processor (Zone1)
4Eh
4Fh
50h
51h
52h
53h
R/W
R/W
R/W
R/W
R/W
R/W
7
7
7
7
7
7
6
6
6
6
6
6
5
5
5
5
5
5
4
4
4
4
4
4
3
3
3
3
3
3
2
2
2
2
2
2
1
1
1
1
1
1
0
0
0
0
0
0
81h
7Fh
81h
7Fh
81h
7Fh
Low Temp
Processor (Zone1)
High Temp
Internal (Zone2)
Low Temp
Internal (Zone2)
High Temp
Remote (Zone3)
Low Temp
Remote (Zone3)
High Temp
Setting the Lock bit has no effect on these registers.
If an external temperature input or the internal temperature sensor either exceeds the value set in the high
limit register or falls below the value set in the low limit register, the corresponding bit will be set
automatically by the EMC6D100/EMC6D101 in the Interrupt Status Register 1 (41h). For example, if the
temperature read from the Remote1- and Remote2+ inputs exceeds the Processor (Zone1) High Temp
register limit setting, Interrupt Status Register 1 ZN1 bit will be set. The temperature limits in these
registers are represented as 8 bit, 2’s complement, signed numbers in Celsius, as shown below in Table
8.5.
Table 8.5 - Temperature Limits vs Register Settings
TEMPERATURE
-127°c
LIMIT (DEC)
-127
LIMIT (HEX)
81h
-50
CEh
-50°c
0
00h
32h
7Fh
0°c
50
127
50°c
127°c
SMSC EMC6D100/EMC6D101
Page 50
Rev. 09-09-04
DATASHEET
SMSC [ SMSC CORPORATION ]
