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EMC2302-1-AIZL-TR 参数 Datasheet PDF下载

EMC2302-1-AIZL-TR图片预览
型号: EMC2302-1-AIZL-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 基于RPM的双PWM风扇控制器 [Dual RPM-Based PWM Fan Controller]
分类和应用: 风扇控制器
文件页数/大小: 44 页 / 627 K
品牌: SMSC [ SMSC CORPORATION ]
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Dual RPM-Based PWM Fan Controller  
Datasheet  
5.16  
Fan Drive Fail Band Registers  
Table 5.26 Fan Drive Fail Band Registers  
ADDR  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
Fan 1 Drive  
Fail Band  
Low Byte  
3Ah  
R/W  
16  
8
4
2
1
-
-
-
00h  
Fan 1 Drive  
Fail Band  
High Byte  
3Bh  
4Ah  
4Bh  
R/W  
R/W  
R/W  
4096 2048 1024  
512  
2
256  
1
128  
-
64  
-
32  
-
00h  
00h  
00h  
Fan 2 Drive  
Fail Band  
Low Byte  
16  
8
4
Fan 2 Drive  
Fall Band  
High Byte  
4096 2048 1024  
512  
256  
128  
64  
32  
The Fan Drive Fail Band Registers store the number of tach counts used by the Fan Drive Fail  
detection circuitry. This circuitry is activated when the fan drive setting high byte is at FFh. When it is  
enabled, the actual measured fan speed is compared against the target fan speed. These registers  
are only used when the FSC is active.  
This circuitry is used to indicate that the target fan speed at full drive is higher than the fan is actually  
capable of reaching. If the measured fan speed does not exceed the target fan speed minus the Fan  
Drive Fail Band Register settings for a period of time longer than set by the DRIVE_FAIL_CNTx[1:0]  
bits, then the DRIVE_FAIL status bit will be set and an interrupt generated.  
5.17  
TACH Target Registers  
Table 5.27 TACH Target Registers  
ADDR  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
TACH Target  
1 Low Byte  
3Ch  
R/W  
16  
8
4
2
1
-
-
-
F8h  
TACH Target  
1 High Byte  
3Dh  
4Ch  
4Dh  
R/W  
R
4096 2048 1024  
512  
2
256  
1
128  
-
64  
-
32  
-
FFh  
F8h  
FFh  
TACH Target  
2 Low Byte  
16  
8
4
TACH Target  
2 High Byte  
R/W  
4096 2048 1024  
512  
256  
128  
64  
32  
The TACH Target Registers hold the target tachometer value that is maintained by the RPM-based  
Fan Speed Control Algorithm.  
The value in the TACH Target Registers will always reflect the current TACH Target value.  
If one of the algorithms is enabled, setting the TACH Target Register to FFh will disable the fan driver  
(set the fan drive setting to 0%). Setting the TACH Target to any other value (from a setting of FFh)  
will cause the algorithm to invoke the Spin Up Routine after which it will function normally.  
SMSC EMC2302  
Revision 1.1 (10-12-09)  
DATA3S7HEET