RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
6.14
Fan Status Register
Table 6.20 Fan Status Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Fan Status
Register
DRIVE
_FAIL
FAN_
SPIN
FAN_
STALL
27h
R-C
WATCH
-
-
-
-
00h
The Fan Status Register contains the status bits associated with each fan driver.
Bit 7 - WATCH - This bit is asserted ‘1’ if the host has not programmed the fan driver within four (4)
seconds after power up (i.e. the Watchdog Timer has timed out. See Section 5.9.
Bit 5 - DRIVE_FAIL - Indicates that the RPM based Fan Speed Control Algorithm cannot drive the Fan
to the desired target setting at maximum drive. This bit can be masked from asserting the ALERT pin.
‘0’ - The RPM based Fan Speed Control Algorithm can drive Fan to the desired target setting.
‘1’ - The RPM based Fan Speed Control Algorithm cannot drive Fan to the desired target setting
at maximum drive.
Bit 1- FAN_SPIN - This bit is asserted ‘1’ if the Spin up Routine for the Fan cannot detect a valid
tachometer reading within its maximum time window. This bit can be masked from asserting the ALERT
pin.
Bit 0 - FAN_STALL - This bit is asserted ‘1’ if the tachometer measurement on the Fan detects a stalled
fan. This bit can be masked from asserting the ALERT pin.
6.15
Interrupt Enable Register
Table 6.21 Interrupt Enable Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Interrupt
Enable
EXT3_I
NT_EN
EXT2_I
NT_EN
EXT1_I
NT_EN
INT_IN
T_EN
28
R/W
-
-
-
-
00h
The Interrupt Enable Register controls the masking for each temperature channel. When a channel is
masked, it will not cause the ALERT pin to be asserted when an error condition is detected.
Bit 3 - EXT3_INT_EN (EMC2103-2 only) - Allows the External Diode 3 to assert the ALERT pin.
‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External
Diode 3 channel.
‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 3
channel.
Bit 2 - EXT2_INT_EN (EMC2103-2 only) - Allows the External Diode 2 to assert the ALERT pin.
‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External
Diode 2 channel.
‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 2
channel.
Bit 1 - EXT1_INT_EN - Allows the External Diode 1 to assert the ALERT pin.
‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External
Diode 1 channel.
SMSC EMC2103
Revision 0.85 (01-29-08)
DATA5S1HEET
SMSC [ SMSC CORPORATION ]
