Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table 20.28 LPC LGPIO Output Register H
N/A
HOST ADDRESS
8051 ADDRESS
POWER
0x7FA5
VCC1
0x00
DEFAULT
BIT
D7
D6
D5
D4
D3
R/W
D2
R/W
D1
R/W
D0
R/W
R
R
R
R
HOST TYPE
BIT NAME
Reserved
Reserved Reserved Reserved LGPIO63 LGPIO62 LGPIO61 LGPIO60
20.4.3.3 LPC Select Register
The LPC SELECT register is used to determine the host for the four LGPIO groups (Table 20.29,
"LGPIO Pin Group LPC Select Register H").
There are two bits for LPGIO pin groups G and H. When an LPC SELECT bit is “1”, the LGPIO pins in
that group are controlled by the LPC Host. When an LPC SELECT bit is “0”, the LGPIO pins in that
group are controlled by the 8051.
Note 20.10 LPC and 8051 LGPIO runtime register access is unaffected by the LPC SELECT bits.
All of the LGPIO pin groups are controlled by the 8051 by default.
APPLICATION NOTE: For the LPC Host to “own” an LGPIO pin group, it should be configured by the 8051 before
the BIOS can activate the LPC LGPIO logical device block.
Table 20.29 LGPIO Pin Group LPC Select Register H
N/A
HOST ADDRESS
8051 ADDRESS
POWER
0x7FA9
VCC1
0x00
DEFAULT
BIT
D7
D6
D5
D4
D3
D2
D1
R/W
D0
R/W
R
R
R
R
R
R
HOST TYPE
Reserved
Reserved Reserved Reserved Reserved Reserved LPC
LPC
SELECT SELECT
GROUP GROUP
BIT NAME
H
G
Revision 1.1 (01-14-03)
234
SMSC LPC47N350
DATASHEET