Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table 20.20 LPC LGPIO Input Register H
BASE
HOST ADDRESS
ADDR. + 4
N/A
8051 ADDRESS
POWER
VCC2
N/A
DEFAULT
BIT
D7
D6
D5
D4
D3
D2
D1
D0
R
R
R
R
R
R
R
R
HOST TYPE
Reserved
Reserved Reserved Reserved LGPIO63 LGPIO62 LGPIO61 LGPIO60
IN IN IN IN
BIT NAME
Table 20.21 LPC LGPIO Output Register H
BASE
HOST ADDRESS
ADDR. + 5
N/A
8051 ADDRESS
POWER
VCC2
0x00
DEFAULT
BIT
D7
D6
D5
D4
D3
R/W
D2
R/W
D1
R/W
D0
R/W
R
R
R
R
HOST TYPE
Reserved
Reserved Reserved Reserved LGPIO63 LGPIO62 LGPIO61 LGPIO60
OUT OUT OUT OUT
BIT NAME
20.4.3 LGPIO MMCR (8051) Registers
These registers are accessible by the 8051 MMCR Address.
Table 20.22 LGPIO MMCR (8051) Registers Summary
8051 MMCR
ADDRESS
REGISTER TYPE
8051 MMCR REGISTER NAME
0x7FA0
0x7FA1
R/W
R
LGPIO DIRECTION REGISTER G
LGPIO INPUT REGISTER G
Revision 1.1 (01-14-03)
230
SMSC LPC47N350
DATASHEET