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ST2202A 参数 Datasheet PDF下载

ST2202A图片预览
型号: ST2202A
PDF下载: 下载PDF文件 查看货源
内容描述: 8位集成微控制器256K字节ROM [8 BIT Integrated Microcontroller with 256K Bytes ROM]
分类和应用: 微控制器
文件页数/大小: 75 页 / 2179 K
品牌: SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
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ST2202A  
9. GPIO  
Portꢀdataꢀregisters:ꢀPA  
Portꢀdirectionꢀcontrolꢀregisters:ꢀPCA  
Portꢀtypeꢀselectꢀregisters:ꢀPSC  
Portꢀfunctionꢀselectꢀregisters:ꢀPFCꢀandꢀPFD  
Portꢀmiscellaneousꢀcontrolꢀregister:ꢀPMCR  
~PE, PLꢀ  
TheꢀST2202ꢀconsistsꢀofꢀ48ꢀgeneralꢁpurposeꢀI/Oꢀ(GPIO)ꢀwhichꢀ  
areꢀdividedꢀintoꢀsixꢀI/Oꢀports:ꢀPortꢁA/B/C/D/EꢀandꢀPortꢁL.ꢀ  
ControlꢀregistersꢀofꢀGPIOꢀareꢀshownꢀasꢀfollowingꢀandꢀinꢀTABLEꢀ  
9ꢁ1.ꢀ  
~
PCE, PCL  
TABLE 9-1 Summary Of Control Registers Of GPIO  
Address Name  
R/W  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Default  
$000 PA  
$001 PB  
$002 PC  
$003 PD  
$004 PE  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
Wꢀ  
PA[7]ꢀ  
PB[7]ꢀ  
PC[7]ꢀ  
PD[7]ꢀ  
PE[7]ꢀ  
PL[7]ꢀ  
PA[6]ꢀ  
PB[6]ꢀ  
PC[6]ꢀ  
PD[6]ꢀ  
PE[6]ꢀ  
PL[6]ꢀ  
PA[5]ꢀ  
PB[5]ꢀ  
PC[5]ꢀ  
PD[5]ꢀ  
PE[5]ꢀ  
PL[5]ꢀ  
PA[4]ꢀ  
PB[4]ꢀ  
PC[4]ꢀ  
PD[4]ꢀ  
PE[4]ꢀ  
PL[4]ꢀ  
PA[3]ꢀ  
PB[3]ꢀ  
PC[3]ꢀ  
PD[3]ꢀ  
PE[3]ꢀ  
PL[3]ꢀ  
PA[2]ꢀ  
PB[2]ꢀ  
PC[2]ꢀ  
PD[2]ꢀ  
PE[2]ꢀ  
PL[2]ꢀ  
PA[1]ꢀ  
PB[1]ꢀ  
PC[1]ꢀ  
PD[1]ꢀ  
PE[1]ꢀ  
PL[1]ꢀ  
PA[0]ꢀ  
PB[0]ꢀ  
PC[0]ꢀ  
PD[0]ꢀ  
PE[0]ꢀ  
PL[0]ꢀ  
1111ꢀ1111ꢀ  
1111ꢀ1111ꢀ  
1111ꢀ1111ꢀ  
1111ꢀ1111ꢀ  
1111ꢀ1111ꢀ  
1111ꢀ1111ꢀ  
$04C PL  
$005 PSC  
$008 PCA  
$009 PCB  
$00A PCC  
$00B PCD  
$00C PCE  
$04E PCL  
$00D PFC  
$00E PFD  
$00F PMCR  
PSC[7]ꢀ PSC[6]ꢀ PSC[5]ꢀ PSC[4]ꢀ PSC[3]ꢀ PSC[2]ꢀ PSC[1]ꢀ PSC[0]ꢀ 1111ꢀ1111ꢀ  
PCA[7]ꢀ PCA[6]ꢀ PCA[5]ꢀ PCA[4]ꢀ PCA[3]ꢀ PCA[2]ꢀ PCA[1]ꢀ PCA[0]ꢀ 0000ꢀ0000ꢀ  
PCB[7]ꢀ PCB[6]ꢀ PCB[5]ꢀ PCB[4]ꢀ PCB[3]ꢀ PCB[2]ꢀ PCB[1]ꢀ PCB[0]ꢀ 0000ꢀ0000ꢀ  
PCC[7]ꢀ PCC[6]ꢀ PCC[5]ꢀ PCC[4]ꢀ PCC[3]ꢀ PCC[2]ꢀ PCC[1]ꢀ PCC[0]ꢀ 0000ꢀ0000ꢀ  
PCD[7]ꢀ PCD[6]ꢀ PCD[5]ꢀ PCD[4]ꢀ PCD[3]ꢀ PCD[2]ꢀ PCD[1]ꢀ PCD[0]ꢀ 0000ꢀ0000ꢀ  
PCE[7]ꢀ PCE[6]ꢀ PCE[5]ꢀ PCE[4]ꢀ PCE[3]ꢀ PCE[2]ꢀ PCE[1]ꢀ PCE[0]ꢀ 0000ꢀ0000ꢀ  
PCL[7]ꢀ PCL[6]ꢀ PCL[5]ꢀ PCL[4]ꢀ PCL[3]ꢀ PCL[2]ꢀ PCL[1]ꢀ PCL[0]ꢀ 0000ꢀ0000ꢀ  
RXD0ꢀ  
RXD1ꢀ  
PULLꢀ  
R/Wꢀ  
R/Wꢀ  
R/Wꢀ  
TXD0ꢀ  
TXD1ꢀ  
SRDYꢀ  
CS6ꢀ  
SSꢀ  
CS5ꢀ  
MOSIꢀ  
CS4ꢀ  
MISOꢀ  
CS3ꢀ  
BCOꢀ  
SCKꢀ  
CS2ꢀ  
TCO1ꢀ  
INTXꢀ  
CS1ꢀ  
TCO0ꢀ  
0000ꢀ0000ꢀ  
0000ꢀ0000ꢀ  
1000ꢀ0000ꢀ  
PDBNꢀ INTEGꢀ CSM1ꢀ CSM0ꢀ  
Eachꢀsingleꢀpinꢀcanꢀbeꢀprogrammedꢀtoꢀbeꢀinputꢀorꢀoutput.ꢀThisꢀ  
isꢀcontrolledꢀbyꢀportꢀdirectionꢀcontrolꢀregistersꢀPCx.ꢀSettingꢀbitꢀ  
ofꢀPCxꢀmakesꢀrespectiveꢀpinꢀtoꢀoutput,ꢀandꢀclearingꢀthisꢀbitꢀforꢀ  
input.ꢀThereꢀareꢀtwoꢀoptions:ꢀpullꢁup/downꢀforꢀinputsꢀofꢀPortꢁCꢀ  
butꢀonlyꢀpullꢁupꢀforꢀinputsꢀofꢀtheꢀotherꢀports.ꢀInꢀcaseꢀofꢀoutput,ꢀ  
thereꢀareꢀopenꢁdrain/CMOSꢀoptionsꢀforꢀoutputsꢀofꢀPortCꢀbutꢀ  
onlyꢀCMOSꢀforꢀtheꢀotherꢀports.ꢀReferꢀtoꢀTABLEꢀ9ꢁ2.ꢀ  
VCC  
PULLꢁUP  
PMOS  
PULLꢁUP  
PORT  
CONTROL  
REGISTER  
(ꢀPCRꢀ)  
PORT  
DATA  
REGISTER  
(ꢀPDRꢀ)  
TABLE 9-2 I/O Types Of GPIO Ports  
DATAꢀINPUT  
I/O Types  
I/O Mode  
RD_INPUT  
Port-A/B/D/E/L  
Pullꢁup/Pureꢀ  
CMOSꢀ  
Port-C  
Input  
Pullꢁup/Pullꢁdown/Pureꢀ  
Openꢁdrain/CMOSꢀ  
FIGURE 9-1 Configuration Of Inputs  
Output  
Output Mode  
Inꢀcaseꢀofꢀoutputꢀfunction,ꢀWriteꢀtoꢀportꢀdataꢀregistersꢀPx  
makesꢀpinsꢀtoꢀoutputꢀdesiredꢀvalue.ꢀThisꢀvalueꢀcanꢀalsoꢀbeꢀ  
readꢀbackꢀbyꢀreadꢀinstruction.ꢀBesidesꢀPortꢁC,ꢀtheꢀoutputꢀpinsꢀ  
areꢀCMOSꢀtype.ꢀPortꢁCꢀhaveꢀtwoꢀoptionsꢀofꢀoutputꢀtypes:ꢀ  
openꢁdrainꢀandꢀCMOS,ꢀandꢀisꢀcontrolledꢀbyꢀportꢀtypeꢀselectꢀ  
registersꢀPSC.ꢀClearingꢀbitsꢀofꢀregistersꢀPSCꢀisꢀforꢀthatꢀdisableꢀ  
PMOSꢀofꢀoutputꢀstageꢀandꢀleftꢀonlyꢀNMOS,ꢀwhileꢀsettingꢀbitsꢀisꢀ  
forꢀCMOS.ꢀReferꢀtoꢀFIGUREꢀ9ꢁ2.ꢀ  
Input Mode  
Inꢀcaseꢀofꢀinputꢀfunction,ꢀportꢀdataꢀregistersꢀPxꢀreflectꢀtheꢀ  
valuesꢀonꢀassociatedꢀpins.ꢀBesidesꢀreadꢀinstructionꢀforꢀdataꢀofꢀ  
signalsꢀinput,ꢀwritingꢀtoꢀregisterꢀPxꢀselectsꢀI/Oꢀtypesꢀofꢀpins,ꢀ  
pullꢁupꢀorꢀpullꢁdown.ꢀSettingꢀbitsꢀofꢀallꢀportꢀdataꢀregisterꢀPxꢀtoꢀ  
selectꢀpullꢁupꢀtype.ꢀClearingꢀbitsꢀofꢀonlyꢀPCꢀtoꢀselectꢀpullꢁdownꢀ  
typeꢀforꢀpinsꢀofꢀPortꢁC.ꢀThereꢀareꢀnoꢀpullꢁdownꢀresistorsꢀforꢀ  
PortꢁA/B/D/EꢀandꢀPortꢁL,ꢀtherebyꢀnoꢀpullꢁdownꢀresistorsꢀwillꢀbeꢀ  
enabledꢀifꢀclearingꢀbitsꢀofꢀPA,ꢀPB,ꢀPD,ꢀPEꢀandꢀPL.ꢀPullꢁupꢀ  
resistorsꢀofꢀPortꢁA/B/D/E/LꢀareꢀalsoꢀcontrolledꢀbyꢀPULLꢀbitꢀ(bit7ꢀ  
ofꢀportꢀmiscellaneousꢀregisterꢀPMCR),ꢀ“0”ꢀisꢀtoꢀdisable,ꢀwhileꢀ  
“1”ꢀisꢀtoꢀenableꢀthem.ꢀTheꢀpullꢁup/pullꢁdownꢀresistorsꢀofꢀPortꢁCꢀ  
areꢀfurtherꢀcontrolledꢀbyꢀbitsꢀofꢀportꢀtypeꢀselectꢀregistersꢀPSC.ꢀ  
TheyꢀworkꢀinꢀtheꢀsameꢀwayꢀwithꢀPULLꢀbitꢀofꢀPMCRꢀbutꢀonlyꢀonꢀ  
singleꢀpin,ꢀ“0”ꢀisꢀtoꢀdisable,ꢀwhileꢀ“1”ꢀisꢀtoꢀenable.ꢀReferꢀtoꢀ  
FIGUREꢀ9ꢁ1.ꢀ  
FIGURE 9-2 Configuration Of Outputs  
Verꢀ2.5ꢀ  
15  
/75  
9/16/2008ꢀ  
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